Kinetic Technologies

Silicon Fidelity, Inc.

Maxim Integrated Products, Inc.

Farshid Iravani

Jan Nilsson

William Robert Pelletier

Timothy K McGuire

Kin Shum

A switching regulator may comprise an inductor housed in an inductor housing, a wire electrically coupled to the inductor and housed in the inductor housing, an electrical component including a terminal, and a board including a board trace. The board trace may electrically couple the terminal with first wire. The electrical component and the inductor housing may be attached to the board. The attachment of the inductor housing to the board may create a space between the inductor housing and the board. The electrical component may be disposed within the space.

Power conversion device with integrated discrete inductor

A switching regulator may include an inductor housing, a board, and one or more electrical components. The inductor housing may house an inductor and one or more wires. The board may include one or more board traces and one or more solder pads. The electrical components may include one or more chips, capacitors, voltage sources, and/or other electrical components. The inductor housing may be attached to the board to create a space between the inductor housing and the board. The space may be created underneath the inductor housing and above the board. One or more electrical components may be attached to the board. One or more electrical components may be disposed within the space.

A slotted gate power transistor is a lateral power device including a substrate, a gate dielectric formed over the substrate, a channel region in the substrate below the gate dielectric and gate electrode layer formed over the gate dielectric. The gate electrode layer overlaps the gate dielectric above the channel region, an accumulation region, and a drift region below an oxide filled shallow trench isolation (or STI) or locally oxidized silicon (LOCOS) region. The slotted gate power transistor includes one or more slots or openings on the gate electrode layer over the accumulation region. Electrical connectivity is maintained over the entire gate electrode layer without external wiring.

Power semiconductor transistor with improved gate charge

Semiconductor devices, such as LDMOS devices, are described that include a plurality of trench regions formed in an extended drain region of the devices. In one or more implementations, the semiconductor devices include a substrate having an extended drain region, a source region, and a drain region, all of the first conductivity type, formed proximate to a surface of the substrate. A gate is positioned over the surface and between the source region and the drain region. The gate is configured to receive a voltage so that a conduction region may be formed at least partially below the gate to allow charge carriers (e.g., majority carriers) to travel between the source region and the drain region. A plurality of trench regions are formed within the extended drain region that are configured to increase resistivity within the extended drain region when charge carriers travel between the source region and the drain region.

Growing community of inventors

Cupertino, CA, United States of America

Farshid Iravani