Micrel, Incorporated

Monolithic Power Systems, Inc.

Farhood Moraveji

Michael Ren Hsing

David J Kunst

Steven A Martinez

Behzad Mohtashemi

An error amplifier expected to exhibit rail-to-rail operation, high bandwidth, and high slew rate, is described, the error amplifier comprising a first stage to receive an input differential voltage and to provide transconductance gain, an intermediate stage to provide current gain, and an output stage to drive a load.

High bandwidth, rail-to-rail differential amplifier with input stage transconductance amplifier

High bandwidth, rail-to-rail differential amplifier with intermediate stage current amplifier

High bandwidth, rail-to-rail differential amplifier with output stage amplifier

A circuit provides a voltage reference using very low power. It can also be used as a shut regulator for a quiescent current as low as 1.5 &#x3bc;A. It includes a transconductance amplifier, a gain stage, and a power transistor. One embodiment of this invention utilizes a work function difference between pgate and ngate to generate a predetermined reference voltage. In another embodiment of this invention, the predetermined reference voltage can be pre-adjusted using gate materials with different work functions.

Low-power voltage reference

Methods and apparatus are disclosed for providing stable voltage references from within a low dropout voltage regulator. Some embodiments utilize dependable semiconductor inherent attributes to generate a voltage reference, such as a band-gap voltage reference.

Low dropout linear regulator having high power supply rejection and low quiescent current

The present invention provides a method and apparatus for dynamically correcting overshoot and undershoot errors in an analog integrated circuit by improving the reaction time (&#x394;t) of the analog integrated circuit. Equivalently, an error correction circuit is disclosed including an overshoot correction circuit and an undershoot correction circuit that are only activated to reduce overshoot and undershoot errors by increasing the bandwidth of the integrated circuit when either undershoot or overshoot errors are detected.

Method and apparatus for overshoot and undershoot errors correction in analog low dropout regulators

A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.

Current-limiting circuitry

A current mirror includes a serially connected diode-connected transistor of a first conductivity type, a saturated (fully-on) transistor of a second conductivity type, and a current source for providing a reference current. A gate voltage generated by the diode-connected transistor in response to the reference current is provided to the gate of a matching transistor. This causes the matching transistor to mirror the reference current. Meanwhile, an output transistor cascoded with the matching transistor is gate-coupled to the junction between the saturated transistor and the current source. This allows the output transistor to provide an output voltage swing from one supply voltage to two saturation voltage drops from the second supply voltage. Meanwhile, the cascode configuration gives the current mirror a high output impedance.

Wide swing, low power current mirror with high output impedance

A CMOS amplifier includes a CMOS inverter and a bias circuit coupled in a feedback loop between the output and input of the inverter. The bias circuit provides linear biasing so that the inverter can apply a desired gain to a high frequency input signal. The bias circuit can include an operational amplifier (op-amp) providing positive feedback control between the output and input of the inverter. By providing a reference voltage to the other input of the op-amp, the input of the inverter is regulated such that its output is driven to the reference voltage. This in turn forces the inverter to operate in its linear region, so that the inverter applies non-distorting amplification to the input AC signal. The AC signal is prevented from affecting the operation of the bias circuit by resistors coupling the bias circuit to the op-amp.

High frequency power amplifier

A differential CMOS amplifier includes two CMOS inverters and biasing circuitry providing feedback loops across the output and input of each inverter. The biasing circuitry provides linear biasing so that the inverters can apply a desired gain to a pair of high frequency input signals (i.e., a differential input signal). The biasing circuitry can include operational amplifiers (op-amps) for providing positive feedback control between the output and input of the inverters. The inputs of the inverters can be regulated by this feedback loop such that their outputs are driven to the reference voltage, thereby forcing the inverters to operate in their linear regions so that non-distorting amplification can be applied to the input AC signals.

High frequency differential power amplifier

Systems and methods for the measurement of optical power in optical fiber are disclosed. The optical signal is converted to an electrical signal, which is then converted to a digital output code that indicates the relative strength of the optical signal in terms of logarithmic units.

Measurement of optical power in optical fiber networks

A differential charge pump includes common mode circuitry for supplying a common mode voltage to a charging capacitor in the charge pump. The gate voltage of a reference transistor in a biasing branch of the differential charge pump is adjusted until the drain voltage of the reference transistor is equal to the common mode voltage when a specified bias current is flowing through the biasing branch. The same gate voltage and bias current are provided to a first transistor in a first common mode branch and a second transistor in a second common mode branch. The drains of the first transistor and the second transistor are connected to a first plate and a second plate, respectively, of the charging capacitor. In this manner, a desired common mode voltage is supplied to the charging capacitor.

Differential charge pump

A novel operational amplifier is disclosed which is divided into an input stage, a common mode feedback stage and an output stage. The output of the operational amplifier swings rail to rail, and the input may swing nearly rail to rail. The operational amplifier combines fast response with low power consumption and low supply voltage.

Low voltage, low power operational amplifier with rail to rail output

The present invention provides for an output stage which couples with an input stage and is configured to limit a reflection current which is reflected back into the input stage to enhanced an output voltage to drive a variety of loads. The present output stage limits the reflection current by compensating for at least one bias current at the input stage output. The output stage further reduced a quiescent current needed to maintain the output stage in an active state without adversely affecting the output voltage supplied to the load. The output stage includes a first and second current driving stage, a first and second current compensation circuit and an output circuit. The first and second current driving stages couple with both the input stage and the output circuit. The first and second current driving stages are configured to generate a first and second driving current, respectively, to drive the output circuit, wherein the first driving current is proportional to a first bias current and the second driving current is proportional to a second bias current. To limit reflection current the first current compensation circuit is configured to compensate for the first bias current while the second current compensation circuit is configured to compensate for the second bias current.

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Saratoga, CA, United States of America

Farhood Moraveji