Taiwan Semiconductor Manufacturing Comp. Ltd.

Fang-Yi Liao

Chi On Chui

Yung-Cheng Lu

Che-Hao Chang

Chunyao Wang

Sung-En Lin

Yen-Chun Huang

Shu Ling Liao

Wan-Yi Kao

Yu-Chang Lin

Semiconductor devices including fin-shaped isolation structures and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a fin extending from a semiconductor substrate; a shallow trench isolation (STI) region over the semiconductor substrate adjacent the fin; and a dielectric fin structure over the STI region, the dielectric fin structure extending in a direction parallel to the fin, the dielectric fin structure including a first liner layer in contact with the STI region; and a first fill material over the first liner layer, the first fill material including a seam disposed in a lower portion of the first fill material and separated from a top surface of the first fill material, a first carbon concentration in the lower portion of the first fill material being greater than a second carbon concentration in an upper portion of the first fill material.

Semiconductor device and method

A semiconductor device and a method of forming the same are provided. A device includes a substrate, a first isolation structure over the substrate, a first fin and a second fin over the substrate and extending through the first isolation structure, and a hybrid fin extending into the first isolation structure and interposed between the first fin and the second fin. A top surface of the first fin and a top surface of the second fin are above a top surface of the first isolation structure. A top surface of the hybrid fin is above the top surface of the first isolation structure. The hybrid fin includes an upper region, and a lower region under the upper region. The lower region includes a seam. A topmost portion of the seam is below the top surface of the first fin and the top surface of the second fin.

Hybrid fin structure of semiconductor device and method of forming same

A device includes a semiconductor fin, an isolation layer, a dielectric fin structure, and a gate structure. The semiconductor fin is over a substrate. The isolation layer is over the substrate and adjacent the semiconductor fin. The dielectric fin structure is over the isolation layer and includes a bottom dielectric fin and a top dielectric fin. The isolation layer surrounds a bottom of the bottom dielectric fin. The top dielectric fin is over the bottom dielectric fin and is spaced apart from the isolation layer. The gate structure is across the semiconductor fin and the dielectric fin structure, wherein a portion of the gate structure in contact with the isolation layer has a first width, and another portion of the gate structure in contact with the top dielectric fin has a second width greater than the first width.

Semiconductor device and manufacturing method thereof

A method includes patterning a trench and depositing a first insulating material along sidewalls and a bottom surface of the trench using a conformal deposition process. Depositing the first insulating material includes forming a first seam between a first portion of the first insulating material on a first sidewall of the trench and a second portion of the first insulating material on a second sidewall of the trench. The method further includes etching the first insulating material below a top of the trench and depositing a second insulating material over the first insulating material and in the trench using a conformal deposition process. Depositing the second insulating material comprises forming a second seam between a first portion of the second insulating material on the first sidewall of the trench and a second portion of the second insulating material on a second sidewall of the trench.

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Hsinchu, Taiwan

Fang-Yi Liao