Taiwan Semiconductor Manufacturing Comp. Ltd.

Fang-Shi Jorcan Lai

Wesley Lin

The present invention discloses a memory device with a leakage current reduction feature. The memory device includes at least one memory cell for storing a value, and at least one switch module coupled to the memory cell for generating an operating voltage at various levels depending on various operation modes of the memory cell. The operating voltage is at a first level when the memory cell is being accessed, and is at a second level lower than the first level when the memory cell is not being accessed, thereby reducing a leakage current for the memory cell.

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Hsinchu, Taiwan

Fang-Shi Jorcan Lai