Qualcomm Incorporated

National University of Singapore

Nanyang Technological University

Fan Yang

Hua Guan

Wee Ser

Jize Jiang

YuFei Pan

Hardik M Patel

Kuan Chuang Koay

Shamim Ahmed

Chengyue Yu

Wanqiang Sheng

Yongliang Zhang

Xin-Yuan Fu

Xiaodong Meng

Yingjie Chen

Fu Xin-Yuan

Zhuliang Yu

Apparatus and techniques for an integrated circuit (IC) package to automatically detect, through an input/out pin, external component parameters and parasitics. An example IC package generally includes a pin for coupling to a component external to the IC package, and at least one of a resistance detector, an inductance detector, or a capacitance detector coupled to the pin, and configured to detect at least one of a resistance, an inductance, or a capacitance, respectively, of a lumped parameter model for the component external to the IC package. The resistance detector, inductance detector, or capacitance detector may also be configured to detect parasitics associated with at least one of the component, the pin, or a connection between the component and the pin.

Integrated circuit package with internal circuitry to detect external component parameters and parasitics

The disclosure relates to an apparatus including: a first set of one or more field effect transistors (FETs) coupled between a first voltage rail and a load; a second set of one or more FETs coupled between the first voltage rail and the load; a gate voltage control circuit configured to: provide a first set of gate voltages to first and second gates of the first and second sets of one or more FETs in accordance with a first mode of operation, respectively; and provide a second set of gate voltages to the first and second gates of the first and second sets of one or more FETs in accordance with a second mode of operation, respectively; and a voltage droop compensation circuit configured to control an output voltage across the load during a transition from the first mode of operation to the second mode of operation.

Low-dropout (LDO) voltage regulator with voltage droop compensation circuit

Certain aspects of the present disclosure provide a power supply system. The power supply system generally includes a first voltage regulator and a second voltage regulator, outputs of the first voltage regulator and the second voltage regulator being coupled to an output of the power supply system. The power supply system may also include a current balancer circuit configured to adjust an output current of the first voltage regulator based on determined headrooms of the first voltage regulator and the second voltage regulator.

Load balancing architecture for ganging voltage regulators

Disclosed herein is a T-helper cell ('T-GM' cell) that is regulated by IL-7/STAT5 and which secrete GM-CSF/IL-3. Also disclosed are methods and compositions for modulating T-GM function for the treatment of, e.g., inflammatory disorders. Diagnostic and prognostic methods for specifically identifying T-GM-mediated inflammatory disorders (e.g., rheumatoid arthritis), as distinct from and/or in addition to non-T-GM-mediated (e.g., TNF-&#x3b1;-mediated) inflammatory disorders, are also provided.

Methods and compositions for modulating T-GM cell function

Growing community of inventors

Singapore, Singapore

Fan Yang