Shenzhen Goodix Technology Co., Ltd.

Faisal Hussein

Ahmed Emira

Kaveh Moazzami

Techniques are described for ground-intermediating buffering that can effectively use the reference grounds of the circuit domains on either side of a buffer stage to generate one or more intermediated grounds for one or more signal buffers. For example, one of the reference grounds has a first amount of ground noise, the other of the reference grounds has a second amount of ground noise that is greater than or less than the first amount, and the intermediated grounds are generated to have respective amounts of ground noise that are between the first and second amounts. The ground intermediating buffer can perform signal buffering with respect to the intermediated ground(s), thereby reducing ground noise coupling across the circuit domains through both the signal and ground paths of the buffer stage.

Ground intermediation for inter-domain buffer stages

Techniques are described for reducing frequency pulling in voltage-controlled oscillator (VCO) circuits. Some embodiments operate in context of a transmitter having a VCO and a power amplifier (PA), where resonant components of the VCO are impacted by magnetically coupled feedback from resonant components of the PA. The VCO and PA are coupled via a set of signal path components that cause signal path delay, such that the feedback signal is phase-delayed with respect to the signal generated by the VCO. A coupling delay matching system is used to introduce additional delay, thereby further phase-shifting the feedback signal to an integer multiple of the oscillation period of the VCO signal; thereby reducing frequency pulling of the VCO.

Voltage controlled oscillator pulling reduction

Techniques are described for staggered-bias varactors. For example, a staggered-bias varactor can include a control voltage node, a number of bias voltage nodes, and a number of sub-varactors coupled in parallel. The control voltage node can be configured to receive a single, variable control voltage; and the bias voltage nodes can each be configured to receive a different, fixed bias voltage. Each sub-varactor is configured, so that its equivalent capacitance is a function of a difference between the control voltage and a respective one of the bias voltages; and the equivalent capacitance of the staggered-bias varactor is a function of the capacitances of the component sub-varactors. The number of varactors and the bias voltages can be configured, so that respective non-linear capacitive responses of the component sub-varactors effectively combine to yield a substantially linear capacitive response for the staggered-bias varactor as a whole.

Staggered-bias varactor

Techniques are described for reducing frequency pulling in voltage-controlled oscillator (VCO) circuits. Some embodiments operate in context of a transmitter having a VCO and a power amplifier (PA), where resonant components of the VCO are impacted by magnetically coupled feedback from resonant components of the PA. The VCO and PA are coupled via a set of signal path components that cause signal path delay, such that the feedback signal is phase-delayed with respect to the signal generated by the VCO. A coupling delay matching system is used to introduce additional delay, thereby further phase-shifting the feedback signal to an integer multiple of half of the oscillation period of the VCO signal; thereby reducing frequency pulling of the VCO.

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San Diego, CA, United States of America

Faisal Hussein