Sgs-thomson Microelectronics S.r.l.

Sgsates Componenti Elettronici S.p.a.

Sgs Microelettronica Spa

Stmicroelectronics S.r.l.

Sgs-thomson Microelectronics Limited

Sgs-thomson Microelectronics S.p.a.

Fabrizio Stefani

Edoardo Botti

Carlo Cini

Claudio Diazzi

Aldo Torazzina

Davide Luigi Brambilla

Angelo Alzati

Francesco Adduci

Flavio Francesco Villa

Bruno Murari

Franco Bertotti

Alberto Gola

Claudio Tavazzani

Andrea Fassina

Daniela Nebuloni

Giovanni Capodivacca

Gianluigi Pessina

An output power stage which includes a PNP pull-up transistor and an n-channel FET push-down transistor, driven in phase opposition. This fully complementary stage provides an outstandingly improved power handling capability per semiconductor area occupied, together with a large output voltage swing, but does not require the use of externally connected discrete boot-strap components. The bipolar pull-up transistor can optionally be driven through an FET auxiliary stage, to minimize the power requirements of the preceding signal amplification stage.

Bipolar-plus-DMOS mixed-typology power output stage

An output buffer circuit including an input node, an output stage, an output node that is connected to the output stage, and a control circuit that controls voltage variations during the rising and falling edges of the output signal. The control circuit compares the levels of the input signal and the output signal and drives the output stage. In a preferred embodiment, the control circuit includes first and second logic circuits that are each connected to the input and output nodes. The first logic circuit selectively enables operation of a first driving circuit, and the second logic circuit selectively enables operation of a second driving circuit. Additionally, a method for slew rate control during rising and falling edges of an output signal of an output buffer circuit is provided. According to the method, the level of the output signal and the level of the input signal are compared. If the input and output signals have different levels, a current is injected into or taken from the output node. In one preferred method, the current is injected or taken by controlling a first driving circuit so as to inject a current into the output node or controlling a second driving circuit so as to take a current from the output node.

Full CMOS slew rate controlled input/output buffer

A method of checking an integrity of an electric power connection between a contact pad of an integrated circuit and a corresponding contact pin in an electronic power device, wherein the electronic power device includes at least one final power stage powered from the respective discrete contact pad connected by means of the electric power connection to the respective contact pin. The method of checking is accomplished by providing a resistive connection between two contact pads of the electronic power device bringing the at least one final power stage, powered from the first contact pad, to a conduction state, measuring the potential difference between the two contact pins connected to the two contact pads, and comparing the potential difference with a predetermined nominal potential difference.

Test method for power integrated devices

Circuit for protection of an amplifier stage comprising circuit switching means for turn-off of the stage and piloted through a logic gate OR by a monostable, which generates upon arise of abnormal operating conditions turn-off command signals having a predetermined duration. A sensing circuit upon persistence of abnormal conditions at start-up or during normal operation also sends turn-off signals through the logic gate OR after enablement through a gate AND. The signals of any enablement at the logic gate AND arrive through a logic gate OR from a window comparator coupled with stage start-up members, from the monostable, and from the output of said logic gate AND as a confirmation signal.

Apparatus and method for protecting an amplifier circuit

Intrinsic offset recovery circuit particularly for amplifiers, which comprises an input differential amplifier constituted by a first PNP transistor, by a second PNP transistor, by a third NPN transistor, by a fourth NPN transistor and by a first constant-current source, and a unitary-gain output stage. The recovery circuit furthermore comprises, as connection between the input differential amplifier and the unitary-gain output stage, a gain stage which comprises a fifth NPN transistor which is connected to the output of the input differential amplifier and is connected to a sixth NPN transistor and to a seventh PNP transistor. The seventh transistor is connected to the sixth transistor. The seventh transistor and the sixth transistor are connected to the unitary-gain output stage.

Intrinsic offset recovery circuit particularly for amplifiers

A circuit for limiting temperature without distortion in audio power amplifiers, comprising a temperature sensor for sensing the temperature in an audio power amplifier, and a variable-gain amplifier connected ahead of the audio power amplifier circuit and having a gain control input connected to the temperature sensor to vary the input signal of the audio amplifier in a linear manner. A linear limitation of the power, and therefore of the temperature, is thus obtained in the audio amplifier without introducing distortion.

Circuit for limiting temperature without distortion in audio power

A circuit for sensing the output distortion of amplifier stages of the type which has a first input which receives a voltage signal to be amplified, a second input connected to a feedback network and an output which generates an amplified output signal. The circuit comprises at least one comparator, which receives in input a first signal which is correlated to the voltage signal and a second signal which is correlated to the output signal of the amplifier stage, and is enabled so as to generate a distortion signal in output when the second signal exceeds the first one in terms of absolute value, i.e. in the presence of distortion.

Circuit for securing output distortion, in particular of final stages of

An improved power stage with increased output dynamics. The stage comprises a power amplifier having a first inverting input, a second non-inverting input, an output to be connected to a load and a feedback network comprising a first resistor connected between the inverting input and the output of the power amplifier and a second resistor connected between the first inverting input and a first line set to a first reference voltage by means of a voltage generator with preset values. The stage furthermore comprises an input voltage generator generating an input voltage signal to be amplified and connected between the second non-inverting input and a second line set to a second reference voltage different from said first reference voltage. In order to increase the output dynamics, in particular in the case of low power supply voltage, said voltage generator arranged between the second resistor and said input voltage generator, and generating a voltage which is variable in inverse proportion to the input voltage signal, with respect to the second reference voltage.

Power stage with increased output dynamics

This amplifier stage has saturation control and high dynamics. The stage comprises a pair of input current sources connected in series between a pair of reference voltage lines, a pair of output transistors, connected between the pair of reference voltage lines and defining an intermediate output terminal and a driving circuit comprising active elements and interposed between the input current sources and the output transistors. Saturation control is achieved through a pair of control circuits, one for each output transistor, comprising each a resistor interposed between the driving circuit and the respective output transistor so as to preset the balance saturation gain of the respective output transistor, and a transistor connected with its base to the driving circuit and with its collector and emitter between the output of the amplifier stage and the intermediate connection point between the input current sources, so as to define a negative feedback reducing imbalances existing between the currents fed by the input current sources, and therefore prevent high saturation levels of the transistors.

Amplifier stage with collector output

In an amplifier stage comprising a pair of input current sources, connected in series between a pair of reference potential lines, a pair of output transistors connected between the pair of reference potential lines and defining an intermediate output terminal of the amplifier, a driving circuit comprising active elements and interposed between the input current source and the output transistors, and at least one saturation control circuit comprising at least one control transistor connected with its base to the driving circuit and with its collector and emitter between the output of the amplifier stage and the intermediate point between the input current sources, to detect distortion due to clipping, at least one distribution detection transistor is provided, connected to the control transistor so as to detect the current flowing through the latter, which current is related to the imbalance of the input current sources and therefore to the distortion generated in the stage.

High-dynamics amplifier stage with distortion detection

Differential amplifier stage, having circuit elements for setting the gain to zero, includes a first transistor and a second transistor, whose bases are respectively connected to the positive terminal of a voltage source by a first current generator and a second current generator and are also respectively connected to the emitters of a third and a fourth transistor via a first and a second diode. The emitters of the first and second transistors are both coupled to the negative terminal of the voltage source by means of a third current generator. The collectors of the third and fourth transistors are connected to the negative terminal of the voltage source. The base terminals of the third and fourth transistors respectivlely form first and second input terminals. On the other hand, the collector terminals of the first and second transistors form first and second output terminals. The differential amplifier stage includes a fifth transistor whose collector is respectively connected to the bases of the first and second transistors via a third and a fourth diode, and whose emitter is connected to the negative terminal of the voltage source. The base terminal of this fifth transistor forms an inhibit terminal for setting the gain of the amplifier stage to zero.

Differential amplifier stage having circuit elements for setting the

A device is disclosed for protecting against shorts the transistors of the push-pull stage in a power amplifier operating on a low voltage supply, in particular for car radio sets. The device comprises sensors which are responsive to currents flowing through the two transistors which form the amplifier push-pull stage, and current-to-voltage converters which convert the sensed currents into corresponding respective voltage signals. The latter are compared in respective voltage-comparing circuits with a reference voltage indicative of the highest admissible current through either of the transistors while the other is shorted. The device also comprises two additional voltage comparators wherein the voltage applied to the load, which may be of a resistive or a reactive type, is compared with a set reference voltage which is lower than or in the extreme equal to, in absolute value, the voltage supply to the amplifier push-pull stage. If the voltages being compared exceed in absolute value the set reference voltages, then the output signals from the comparators energize either of the two bistable circuits to cut off the power supply to the amplifier. The device affords a clear cut between shorted and normal operation conditions, and requires no high current peaks to become operative and activate the protection. After the shorted condition is removed, the device provides automatically for restoring the power supply to the amplifier.

Device for protecting the final stage of a power amplifier against

This integrated semiconductor device aims at drastic reduction of the direct secondary breakdown phenomena and has a plurality of side-by-side elementary transistors forming an interdigited structure. To reduce the thermal interaction between the elementary transistors, the latter are spaced apart from one another by a distance approximately equal to the width of one elementary transistor and are driven by current sources. Spacing apart reduces electrothermal interaction. Further, in order to minimize the device area requirements, the space between any two adjacent elementary transistors is made to accommodate drive transistors operating as current sources, or the elementary transistors of the complementary stage where the device forms a class B output stage, the two output transistors whereof are alternatively switched on.

Power transistor with spaced subtransistors having individual collectors

A monolithically integratable control circuit for switching inductive loads, comprising a Darlington-type final stage, is described. The base of the Darlington control transistor is coupled to the collector of a transistor for extracting charge, the transistor conducting in phase opposition to the Darlington control transistor. The emitter of the transistor for extracting charge is coupled to the negative supply terminal and to the output terminal of the final stage, via a first and a second diode respectively.

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Cardano al Campo, Italy

Fabrizio Stefani