Infineon Technologies Austria Ag

Infineon Technologies Ag

Fabio Brucchi

Ralf Otremba

Davide Chiola

Matteo Dainese

Teck Sim Lee

Erich Griebl

Klaus Schiess

Xaver Schloegel

Josef Höglauer

Franz Stueckler

Jürgen Schredl

Bernd Roemer

Wolfgang Peinhopf

Franz Stückler

A reverse-blocking IGBT (insulated gate bipolar transistor) includes a plurality of IGBT cells disposed in a device region of a semiconductor substrate, a reverse-blocking edge termination structure disposed in a periphery region of the semiconductor substrate which surrounds the device region, one or more trenches formed in the periphery region between the reverse-blocking edge termination structure and an edge face of the semiconductor substrate, a p-type dopant source at least partly filling the one or more trenches, and a continuous p-type doped region disposed in the periphery region and formed from p-type dopants out-diffused from the p-type dopant source. The continuous p-type doped region extends from a top surface of the semiconductor substrate to a bottom surface of the semiconductor substrate.

Reverse-blocking IGBT having a reverse-blocking edge termination structure

A device includes a circuit element, a housing for the circuit element and a terminal for coupling the circuit element to an electrical circuit. The terminal includes an engagement portion and a sleeve portion. The engagement portion is configured to engage a base for the electrical circuit. The sleeve portion couples the engagement portion to the circuit element. The housing encloses the sleeve portion.

Discrete device

Various embodiments provide an electronic module comprising a baseplate. A recess is formed in one main surface of the baseplate, wherein the recess is adapted to accommodate an electronic chip. The electronic chip is attached to a substrate or carrier and is placed in the recess.

Baseplate for an electronic module

A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.

Power semiconductor device

A method of manufacturing a reverse-blocking IGBT (insulated gate bipolar transistor) includes forming a plurality of IGBT cells in a device region of a semiconductor substrate, forming a reverse-blocking edge termination structure in a periphery region of the semiconductor substrate which surrounds the device region, etching one or more trenches in the periphery region between the reverse-blocking edge termination structure and a kerf region of the semiconductor substrate, depositing a p-type dopant source which at least partly fills the one or more trenches and diffusing p-type dopants from the p-type dopant source into semiconductor material surrounding the one or more trenches, so as to form a continuous p-type doped region in the periphery region which extends from a top surface of the semiconductor substrate to a bottom surface of the semiconductor substrate after thinning of the semiconductor substrate at the bottom surface.

Method of manufacturing a reverse-blocking IGBT

Various embodiments provide methods for manufacturing a baseplate for an electronic module and an electronic module comprising a baseplate, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.

Method of manufacturing baseplate for an electronic module

An electronic module is provided, comprising an electronic chip arranged in the electronic module; at least two contact terminals electrically connected to the electronic chip each extending out of a package of the electronic module, wherein at least one of the at least two contact terminals is a signal contact terminal comprising a distal signal contact area, and at least another one of the at least two contact terminals is a power contact terminal comprising a distal power contact area; wherein the distal power contact area is adapted to be electrically connected to a power circuit external to the electronic module, wherein the external power circuit is oriented in a first plane; and wherein the distal signal contact area is adapted to be electrically connected to a signal circuit external to the electronic module, wherein the external signal circuit is oriented in a second plane extending perpendicular to the first plane.

Electronic module, electronic system and method of manufacturing the same

Various embodiments provide a baseplate for an electronic module, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.

Baseplate for an electronic module and method of manufacturing the same

In an embodiment, a semiconductor device package includes a bidirectional switch circuit. The bidirectional switch circuit includes a first semiconductor transistor mounted on a first die pad, a second semiconductor transistor mounted on a second die pad, the second die pad being separate from the first die pad, and a conductive connector extending between a source electrode of the first transistor and a source electrode of the second transistor.

Semiconductor device package

A semiconductor package includes a base, a die attached to the base, a lead and a connector electrically connecting the lead to the die. A mold compound encapsulates the die, the connector, at least part of the base, and part of the lead, so that the lead extends outward from the mold compound. An electrical insulation layer separate from the mold compound is attached to a surface of the mold compound over the connector. The electrical insulation layer has a fixed, defined thickness so that the package has a guaranteed minimum spacing between an apex of the connector and a surface of the electrical insulation layer facing away from the connector.

Semiconductor package with top-side insulation layer

In accordance with an embodiment of the present invention, a semiconductor package includes a die paddle, and an encapsulant disposed around the die paddle. The semiconductor package has a first sidewall and a second sidewall. The second sidewall is perpendicular to the first sidewall. The first sidewall and the second sidewall define a corner region. A tie bar is disposed within the encapsulant. The tie bar couples the die paddle and extends away from the die paddle. A dummy lead is disposed in the corner region. The dummy lead is not electrically coupled to another electrically conductive component within the semiconductor package. The distance between the dummy lead and the tie bar is less than a shortest distance between the tie bar and other leads or other tie bars in the semiconductor package.

Semiconductor packages and methods of formation thereof

A chip package is provided, the chip package including: a carrier including at least one cavity; a chip disposed at least partially within the at least one cavity; at least one intermediate layer disposed over at least one side wall of the chip; wherein the at least one intermediate layer is configured to thermally conduct heat from the chip to the carrier.

Chip package and a method for manufacturing a chip package

In accordance with an embodiment of the present invention, a semiconductor module includes a first semiconductor device having a first plurality of leads including a first gate/base lead, a first drain/collector lead, and a first source/emitter lead. The module further includes a second semiconductor device and a circuit board. The second semiconductor device has a second plurality of leads including a second gate/base lead, a second drain/collector lead, and a second source/emitter lead. The circuit board has a plurality of mounting holes, wherein each of the first plurality of leads and the second plurality of leads is mounted into a respective one of the plurality of mounting holes. At the plurality of mounting holes, a first distance from the first gate/base lead to the second gate/base lead is different from a second distance from the first source/emitter lead to the second source/emitter lead.

Growing community of inventors

Villach, Austria

Fabio Brucchi