Motorola Corporation

Eytan Weissberger

Yehuda Volpert

Gabriel Bracha

Ilan Algor

A method for forming one or more redundant vias (38a-38x) around a critical via (36) involves providing an integrated circuit design file (12) containing several overlay layers. Critical vias in the file (12) are identified via a step (16). Several redundant vias are serially placed around and connected in parallel to the critical via (36), and design rules are checked for each redundant via by performing steps (24-30). Redundant vias which do not violate design rules (26) are kept in a separate redundant overlay layer and added to the design of the integrated circuit. The added redundant vias increase the yield of the integrated circuit by bolstering the integrity of critical via connections.

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Ramat Hasharon, Israel

Eytan Weissberger