Nxp B.v.

Koninklijke Philips Corporation N.v.

Ewald Bergler

Roland Brandl

Robert Spindler

Franz Amtmann

Hubert Watzinger

Heimo Scheucher

Josef Preishuber-Pfluegl

Robert Entner

Haiko Klepzig

Reinhard Fetzer

A sub-stage for a charge pump includes a dc input pin, a dc output pin, a first radio frequency (rf) input pin configured to receive a first differential signal, a second rf input pin configured to receive a second differential signal, a first transistor having first, second and third terminals, a second transistor having first, second and third terminals, a first bias voltage source, and a second bias voltage source. The third terminal of the first transistor is configured to receive the second differential signal from the second rf input pin and a first offset voltage signal from the first bias voltage source. The third terminal of the second transistor is configured to receive the second differential signal from the second rf input pin and a second offset voltage signal from the second bias voltage source.

Sub-stage for a charge pump

A circuit () comprises a first circuit point () and a second circuit point (), which first circuit point () and second circuit point () are designed to be connected with RF transmission means () being designed for receiving in a contact-less manner a carrier signal (CS) from a read/write station and for feeding the circuit () with the received carrier signal (CS). The circuit () further comprises circuit testing means () being designed to carry out functional tests of the circuit () and to output a modulated response signal (TS-MOD) via the first and second circuit points () only if the functional tests have been successful. The circuit () further comprises test trigger signal detecting means () being designed for detecting a test trigger signal (TS) that is applied across the first circuit point () and the second circuit point (), wherein the test trigger signal detecting means () are designed to trigger the circuit testing means () to carry out the functional tests if they detect the test trigger signal (TS).

Circuit and data carrier with radio frequency interface

An electric circuit () for generating a clock-sampling signal (CLK) for a sampling device () comprises a clock generator () for generating a plurality of clock signals (---), a correlation device (L) for correlating a characteristic signal section (LE) of a digital signal (DS) with the plurality of clock signals (--), and a selecting device (MX) for selecting one of the clock signals (--) as the clock-sampling signal (CLK) for the sampling device () on the basis of the correlation by the correlation device (L). The clock signals (---) have the same cycle duration (T) and are phase-shifted with respect to each other. The sampling device () subsequently samples the digital signal (DS) with the clock-sampling signal (CLK).

Electric circuit for and method of generating a clock signal

A radio frequency interface circuit () for a radio frequency identification tag comprising&#x2014;at least two input terminals (RF+, RF&#x2212;) for connecting the circuit () with an antenna structure of the radio frequency identification tag, &#x2014;one or more variable resistive loads () coupled across pairs of the input terminals (RF+, RF&#x2212;)&#x2014;one or more rectifiers () each connected on its input side to a pair of input terminals (RF+, RF&#x2212;) and on its output side to a parallel connection of voltage control means () and modulation control means (), wherein combiner means () are provided which are adapted to receive an output signal () from the voltage control means () and the modulation control means (), respectively, and to generate a control signal () for controlling each variable resistive load () depending on the received signals () in such a way that each variable resistive load () serves as a modulation and voltage regulation circuit, and wherein each variable resistive load is adapted to serve as an electro static discharge protection circuit.

Radio frequency interface circuit for a radio frequency identification tag

A data carrier () comprises a data circuit () arranged on a substrate () and data transmission unit () being connected to the data circuit (). The data carrier () further comprises at least one strain gauge unit () being adapted to measure strains exerted on the substrate () and to transmit a deactivating signal (DE) to the data circuit () if the measured strains exceed a defined deactivating strain threshold. If the data circuit () receives the deactivating signal (DE), the data circuit () interrupts a data exchange with an external data reader/writer () via the data transmission unit ().

Data carrier comprising strain gauge means

Circuit for a data carrier, which circuit is capable of supplying identification information to a communications arrangement. A circuit () for a data carrier (), which is able to communicate contactlessly with a communications arrangement (), is provided with a memory stage () for storing identification information (II) consisting of information units and suppliable to the communications arrangement () and with a signal-processing stage () for processing an indicator signal (IS), which indicator signal (IS) indicates a substantially simultaneous appearance of two different information units, of which two different information units the one information unit is contained in the identification information ([I) stored in the memory stage () of the circuit () and the other information unit is contained in different identification information (II') stored in a memory stage of a different circuit (&#x2032;), and which indicator signal (IS) is generated by the communications arrangement () upon detection of such a substantially simultaneous appearance of different information units and is communicated to the circuit (), wherein the signal-processing stage (), as a consequence of a processing of the indicator signal (IS), is arranged to interrupt the supply of the identification information (II) after the appearance of the information unit that has caused the indicator signal (IS) and to flag at least the information unit that has caused the indicator signal (IS).

Data carrier circuit capable of supplying identification information to a communications arrangement

In a method for the determination of disconnection time information (DTI) significant for an inadequate power supply of an integrated circuit () of a data carrier () such as an RFID-tag. The disconnection time information (DTI) is determined on the basis of the discharge behavior of a first storage capacitor (C), which is affected by the IC material and by radiation, and the determined disconnection time information (DTI) is corrected in dependence on the effects of the IC material and/or on at least one radiation effect.

Method for generating power supply interruption time information in a contactless data carrier

In a data carrier () that is arranged to receive a signal (S) in a non-contacting manner, there is provided a circuit () that is arranged, by using the signal (S), to generate a supply voltage (V) for parts of the circuit (), the circuit () having a storage stage () that is arranged to store information capacitively, the information being represented by a value of an information voltage (UI) arising at the storage stage (), and the circuit () having an information-voltage generating stage () that is arranged to receive a control signal (CS), which control signal (CS) is of a voltage value that is at most equal to the value of the supply voltage (V), and that is arranged to generate the information voltage (UI) by using the control signal (CS), wherein the information-voltage generating stage () has a voltage-raising stage () that is arranged to raise the value of the voltage of the control signal (CS).

Data carrier for storing information represented by an information voltage

In a data carrier () that is arranged to receive a signal (S) in a non-contacting manner there is provided a circuit () that is arranged, by using the signal (S), to generate a supply voltage (V) for parts of the circuit (), the circuit () has a storage stage () that is arranged to store information capacitively, the information being represented by a value of an information voltage (UI) arising at the storage stage (), which value of the information voltage (UI) is at most equal to the value of the supply voltage (V), and the circuit () has an evaluation stage () to which the information voltage can be fed and that are arranged to evaluate the information voltage (UI), with the help of a comparison voltage (UC), for the information represented by the information voltage (UI), the comparison-voltage generating stage () that is arranged to generate and emit the comparison voltage (UC) being implemented separately from the evaluation stage (), and the evaluation stage () being arranged to receive the comparison voltage (UC).

Data carrier comprising evaluation means for evaluating information represented by an information voltage

An integrated circuit ( ) has a semiconductor die ( ) and an integrated circuit configuration ( ) realized on the semiconductor die ( ) and situated within bounding faces ( ) of the semiconductor die ( ), in which two conductor track sections ( ) have been provided, which issue from the integrated circuit configuration ( ) and which each extend up to a bounding face ( ) and which are required for the application of a useful signal (BR ) utilized for test purposes during the fabrication of the integrated circuit ( ), and in which an additional conductor track section ( ) has been provided, which is disposed adjacent the two conductor track sections ( ) and which issues from the integrated circuit configuration ( ) and extends toward a bounding surface ( ) and preferably up to this bounding face ( ) and which serves for the application of a spurious signal (BR ) which interferes with testing.

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Weiz, Austria

Ewald Bergler