Nxp B.v.

Evert-Jan Pol

Robert Rutten

Martin Kessel

Kaveh Kianush

Hendrik Van Der Ploeg

Manfred Zupke

Lucien Johannes Breems

Johannes Hubertus Antonius Brekelmans

Muhammed Bolatkale

Jan Van Sinderen

Shagun Bajoria

Sebastian Bohn

Henricus Hubertus Van Den Berg

Peter Van De Haar

Richard Morren

Bernard Burdiek

Marcel Van De Gevel

Prince Thomas

Andreas Johannes Gerrits

Joannes Theodorus Van Der Heiden

Tjeu Van Ansem

Johannes Petrus Wilhelmus Van Beers

Martin Klein

Joerg Heinrich Walter Wenzel

A system () comprising: a first unit () and one or more second units (). The first unit () comprises: a timing reference () configured to provide a master-timing-reference-signal; a master time block configured to provide a master-time-signal () for the first unit () based on the master-timing-reference-signal; and a first interface () configured to: receive timestamped-processed-second-RF-signals from the one or more second units (); and provide a first-unit-timing-signal () to the one or more second units () based on the master-time-signal. The one or more second units () each comprise: a slave time block () configured to: determine a slave-time-signal () for the second unit () based on the master-timing-reference-signal; determine one or more second-timing-values based on the slave-time-signal; determine an adjustment-time based on the first-unit-timing-signal received from the first unit () and the second-timing-values; and adjust the slave-time-signal based on the adjustment-time.

System comprising multiple units

A digital conversion system including a sigma-delta converter, a tone generator that generates injects a tone signal into the conversion path of the sigma-delta converter at a frequency that is outside operating signal frequency range, a tone detector that isolates and detects a level of the injected tone signal and provides a corresponding tone level value, a tone ratio comparator that converts the tone level value into a tone level ratio and that compares the converted tone level ratio with an expected tone level ratio to provide an error signal, and a loop controller that converts the error signal to a correction signal to adjust a loop filter frequency the sigma-delta converter. Tones may be serially injected one at a time or simultaneously in parallel for determining a measured tone level ratio for comparison with a corresponding one of multiple stored expected tone level ratios.

System and method of calibration of sigma-delta converter using tone injection

An integrated circuit comprising: a plurality of on-chip-instrument-modules; a test-controller-module configured to communicate data with the plurality of on-chip-instrument-modules; a functional-module configured to communicate data with the plurality of on-chip-instrument-modules; and an on-chip-instrument-controller. The on-chip-instrument controller is configured to: for each of the plurality of on-chip-instrument-modules, store an access-indicator; and based on a value of the access-indicator for each on-chip-instrument-module, enable the on-chip-instrument-module to communicate with either: the test-controller-module; or the functional-module.

Integrated circuit on chip instrument controller

The disclosure relates to an IQ mismatch correction module for a radio receiver, the IQ mismatch correction module comprising: an input terminal configured to receive an input signal; an output terminal configured to provide a filtered output signal; a mismatch detection module comprising: one or more bandpass filters configured to receive, from the input terminal or output terminal, a bandpass input signal and to pass a plurality of sub-bands of the bandpass input signal to provide respective bandpass filtered signals; one or more amplitude and phase mismatch detectors configured to determine amplitude and phase mismatch coefficients based on the bandpass filtered signals from the plurality of sub-bands; a transformation unit configured to apply a transformation to the amplitude and phase mismatch coefficients to provide correction filter coefficients for the plurality of sub-bands; and a filter module configured to: receive the filter coefficients for the plurality of sub-bands from the mismatch detection module; and filter the input signal in accordance with the received filter coefficients to provide the filtered output signal.

IQ mismatch correction module

A phase locked loop circuit comprising: a phase detector configured to compare the phase of an input signal with the phase of a feedback signal in order to provide an up-phase signal and a down-phase-signal; an oscillator-driver configured to: apply an up-weighting-value to the up-phase signal in order to provide a weighted-up-phase signal; apply a down-weighting-value to the down-phase signal in order to provide a weighted-down-phase signal; and combine the weighted-up-phase signal with the weighted-down-phase signal in order to provide an oscillator-driver-output-signal; and a controller configured to: set the up-weighting-value and the down-phase-weighting as a first-set-of-unequal-weighting-values, and replace the first-set-of-unequal-weighting-values with a second-set-of-unequal-weighting-values if an operating signal of the phase locked loop circuit reaches a limit-value without satisfying a threshold value.

Phase locked loop circuits

A radio receiver including: a serial data interface configured to receive a serial data signal from another radio receiver; a clock/data recovery circuit configured to produce a clock signal and a data signal from the serial data signal; and a radio front-end configured to receive the clock signal from the clock/data recovery circuit to produce a received signal; and signal combining circuit configured to combine the received signal and the data signal.

Multiple antenna distributed radio system

Growing community of inventors

Son en Breugel, Netherlands

Evert-Jan Pol