Samsung Electronics Co., Ltd.

Eunkyu Lee

Hyeonjin Shin

Jaeho Lee

Jinseong Heo

Seongjun Park

Kiyoung Lee

Kyung-Eun Byun

Changseok Lee

Hyunjae Song

Sangwon Kim

Keunwook Shin

Sanghyun Jo

Yeonchoo Cho

Changhyun Kim

Sangyeob Lee

Dongwook Lee

Alum Jung

Seunggeol Nam

Haeryong Kim

Junsoo Kim

Taejin Choi

Sangyeon Han

Huijung Kim

Sangwoo Park

Minwoo Kwon

Wonbae Lim

Eujin Ha

Meeryung Choi

Soyoung Lee

Seungwon Lee

Minsu Seol

Hyunseok Lim

Kyungeun Byun

Minseok Yoo

Junyoung Kwon

Van Luan Nguyen

Wonseok Kang

Kaoru Yamamoto

Sungjoo An

Jungsoo Yoon

Soohwan Chae

Sunmoek Jung

An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of the rest region of the semiconductor layer, a metal layer facing the semiconductor layer, a semi-metal layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the semi-metal layer and the semiconductor and covering the first region.

Interconnect structure to reduce contact resistance, electronic device including the same, and method of manufacturing the interconnect structure

Provided are nanocrystalline graphene and a method of forming the same. The nanocrystalline graphene may include a plurality of grains formed by stacking a plurality of graphene sheets and has a grain density of about 500 ea/μmor higher and a root-mean-square (RMS) roughness in a range of about 0.1 or more to about 1.0 or less. When the nanocrystalline graphene has a grain density and a RMS roughness with these ranges, nanocrystalline graphene capable of covering the entirety of a large area on a substrate as a thin layer may be provided.

Nanocrystalline graphene and method of forming nanocrystalline graphene

A method of calculating a thickness of a graphene layer and a method of measuring a content of silicon carbide, by using X-ray photoelectron spectroscopy (XPS), are provided. The method of calculating the thickness of the graphene layer, which is directly grown on a silicon substrate, includes measuring the thickness of the graphene layer directly grown on the silicon substrate, by using a ratio between a signal intensity of a photoelectron beam emitted from the graphene layer and a signal intensity of a photoelectron beam emitted from the silicon substrate.

Method of calculating thickness of graphene layer and method of measuring content of silicon carbide by using XPS

Provided are a vertical-channel cell array transistor structure and a dynamic random-access memory (DRAM) device including the same. The vertical-channel cell array transistor structure includes a semiconductor substrate, a plurality of channels arranged in an array on the semiconductor substrate and each extending perpendicularly from the semiconductor substrate, a gate insulating layer on the plurality of channels, a plurality of word lines on the semiconductor substrate and extending in a first direction, and a two-dimensional (2D) material layer on at least one surface of each of the plurality of word lines.

Vertical-channel cell array transistor structure and dram device including the same

A semiconductor device according to an embodiment may include a substrate, an adhesive layer, and a semiconductor layer. The semiconductor layer includes a 2D material having a layered structure. The adhesive layer is interposed between the substrate and the semiconductor layer, and has adhesiveness to a 2D material.

Semiconductor device including two-dimensional material

A semiconductor device includes a substrate including an active region, a gate structure disposed in a gate trench in the substrate, a bit line disposed on the substrate and electrically connected to the active region on one side of the gate structure, and a capacitor disposed on the bit line and electrically connected to the active region on another side of the gate structure. The gate structure includes a gate dielectric layer disposed on bottom and inner side surfaces of the gate trench, a conductive layer disposed on the gate dielectric layer in a lower portion of the gate trench, sidewall insulating layers disposed on the gate dielectric layer, on an upper surface of the conductive layer, a graphene conductive layer disposed on the conductive layer, and a buried insulating layer disposed between the sidewall insulating layers on the graphene conductive layer.

Semiconductor devices having buried gates

A graphene manufacturing apparatus includes a reaction chamber a substrate supporter configured to structurally support a substrate inside the reaction chamber; a plasma generator configured to generate a plasma inside the reaction chamber; a first gas supply configured to supply an inert gas into the reaction chamber at a first height from an upper surface of the substrate supporter in a height direction of the reaction chamber; a second gas supply configured to supply a carbon source into the reaction chamber at a second height from the upper surface of the substrate supporter in the height direction of the reaction chamber; and a third gas supply configured to supply a reducing gas into the reaction chamber, wherein the first to third gas supply units are disposed at different heights at a third height from the upper surface of the substrate supporter in the height direction of the reaction chamber.

Methods of forming graphene and graphene manufacturing apparatuses

Example embodiments relate to an image sensor configured to achieve a high photoelectric conversion efficiency and a low dark current. The image sensor includes first and second electrodes, a plurality of photodetection layers provided between the first and second electrodes, and an interlayer provided between the photodetection layers. The photodetection layers convert incident light into an electrical signal and include a semiconductor material. The interlayer includes a metallic or semi metallic material having anisotropy in electrical conductivity.

Image sensor for high photoelectric conversion efficiency and low dark current

A method of selectively growing graphene includes forming an ion implantation region and an ion non-implantation region by implanting ions locally into a substrate; and selectively growing graphene in the ion implantation region or the ion non-implantation region.

Method of growing graphene selectively

Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.

Graphene structure and method of forming graphene structure

An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of a peripheral region of the semiconductor layer, a metal layer facing the semiconductor layer, a graphene layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the graphene layer and the semiconductor and covering the first region.

Provided are an optical sensor including graphene quantum dots and an image sensor including an optical sensing layer. The optical sensor may include a graphene quantum dot layer that includes a plurality of first graphene quantum dots bonded to a first functional group and a plurality of second graphene quantum dots bonded to a second functional group that is different from the first functional group. An absorption wavelength band of the optical sensor may be adjusted based on types of functional groups bonded to the respective graphene quantum dots and/or sizes of the graphene quantum dots.

Optical sensor and image sensor including graphene quantum dots

A method of growing graphene includes forming a carbon monolayer on a substrate by injecting a first reaction gas into a reaction chamber, wherein the first reaction gas includes a first source including a component that is a carbon source and belongs to an electron withdrawing group, and injecting a second reaction gas including a second source into the reaction chamber, wherein the second source includes a functional group that forms a volatile structure by reacting with a component that belongs to an electron withdrawing group. Graphene may be directly grown on a surface of the substrate by repeatedly injecting the first reaction gas and the second reaction gas.

Method of forming graphene

Growing community of inventors

Yongin-si, South Korea

Eunkyu Lee