Samsung Electro-mechanics Co., Ltd.

Eung Suek Lee

Jee Soo Mok

Chang Sup Ryu

Jun Oh Hwang

Je Gwang Yoo

Seung Wook Park

Young Gwan Ko

Yong Ho Baek

Myung Sam Kang

Jae Hoon Choi

No Il Park

Jung Hyun Cho

Tae Sung Jeong

Mi Sun Hwang

Joon Sung Kim

Jun Heyoung Park

Keung Jin Sohn

A chip embedded substrate includes: an insulating layer having outer layer circuit patterns provided on any one of an upper surface and a lower surface thereof; a chip embedded in the insulating layer; and internal circuit patterns included in the insulating layer and disposed between a height of a top surface of the chip and a height of a bottom surface thereof.

Chip embedded substrate

An apparatus for manufacturing a semiconductor package module and a method of manufacturing a semiconductor package are provided. The apparatus for manufacturing a semiconductor package module includes a lower mold installed thereon with a board with at least one element mounted thereon, an upper mold, in a state of accommodating the board, provided above the board, a filler supplier disposed in at least one of the upper mold and the lower mold, and supplying a filler to a molding space between the board and the upper mold, and a pattern forming member provided in an inner surface of the upper mold that provides an uneven pattern on a molded part.

Apparatus and method of manufacturing semiconductor package module

Disclosed is a die mounting substrate, which includes a mounting substrate having a pad, a die having a terminal and surface-mounted on the mounting substrate, and a conductive paste bump formed on the pad or the terminal so as to connect the pad and the terminal to each other. When the die is connected and mounted on the mounting substrate using the conductive paste bump, shear stress is relieved thus preventing reliability from decreasing due to a difference in the coefficient of thermal expansion between the die and the mounting substrate, and also preventing the force of adhesion of the bump from decreasing due to the reduction in size of the pad of the mounting substrate.

Die mounting substrate and method of fabricating the same

A method of manufacturing a printed circuit board, including: applying a conductive paste including carbon nanotubes and a photosensitive binder on a bump-forming area of a circuit substrate having a circuit layer for transferring electrical signals; and patterning the conductive paste, thus forming bumps.

Method of manufacturing printed circuit board

Disclosed herein is a method for manufacturing a semiconductor package which uses a base memberin which a first metal layer, a barrier layer, and a second metal layerare stacked on both surface thereof in sequence based on an adhesive memberto simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chipto a printed circuit board through a solder bump, thereby making it possible to implement a high-density package substrate; and forms a metal postinstead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.

Method for manufacturing semiconductor package

A method of manufacturing a cooling fin and package substrate that includes preparing a mold, which has a support base and a resin layer formed on the support base and including on a side thereof a groove, which is configured to form a cooling fin; printing fireable paste containing a carbon component on a side of the mold that has the groove configured to form a cooling fin; removing the support base to leave a cooling object; and firing the cooling object.

Method of manufacturing cooling fin and package substrate with cooling fin

Growing community of inventors

Gyunggi-do, South Korea

Eung Suek Lee