Samsung Electronics Co., Ltd.

Eun Taek Jung

Ji Hoon Park

Sung Hun Lee

Byoung Il Lee

Joong Shik Shin

Jun Ho Cha

Jong Ho Woo

A three-dimensional semiconductor device including: a peripheral circuit structure disposed between first and second substrates and including a plurality of peripheral interconnections; a gate-stack structure disposed on the second substrate and including a plurality of gate electrodes stacked and spaced apart from each other in a direction perpendicular to an upper surface of the second substrate, wherein the plurality of gate electrodes include a lower gate electrode, a plurality of intermediate gate electrodes disposed on the lower gate electrode, and an upper gate electrode disposed on the plurality of intermediate gate electrodes; a first through region passing through the second substrate and disposed below the gate-stack structure; a second through region passing through the second substrate and the gate-stack structure; and a first peripheral connection plug passing through the first through region and electrically connecting the lower gate electrode to a first peripheral interconnection of the peripheral interconnections.

Three-dimensional semiconductor device having a peripheral connection plug in a through region below a gate stack structure

A semiconductor device includes a substrate having a first region and a second region, the first region including memory cells, and the second region including transistors for driving the memory cells, and device isolation regions disposed within the substrate to define active regions of the substrate. The active regions include a first guard active region surrounding the first region, a second guard active region surrounding a portion of the second region, and at least one dummy active region disposed between the first guard active region and the second guard active region.

Semiconductor device

Growing community of inventors

Seongnam-si, South Korea

Eun Taek Jung