Skhynix Inc.

Eun Mee Kwon

Da Som Lee

Bong Hoon Lee

Jong Sung Jeon

Sun Mi Park

Sang Tae Ahn

Ji Seon Kim

Dong Yean Oh

Nam Kuk Kim

Sang Wan Jin

Hyung Jun Yang

There are provided a semiconductor device and a manufacturing method of a semiconductor device. The semiconductor device includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; channel structures penetrating the gate structure, the channel structures being arranged in a first direction; and a cutting structure extending in the first direction, the cutting structure consecutively penetrating the channel structures. Each of the channel structures includes a first channel structure and a second channel structure, which are isolated from each other by the cutting structure.

Semiconductor device and manufacturing method of semiconductor device

A semiconductor memory device, and a method of manufacturing the same, includes a lower stack in which a plurality of first interlayer insulating layers and first conductive layers are alternately stacked, a plurality of cell plugs passing through the lower stack in a vertical direction, an upper stack in which a plurality of second interlayer insulating layers and at least one second conductive layer are alternately stacked on the lower stack, a plurality of drain select plugs passing through the upper stack and being in contact with an upper portion of the plurality of cell plugs, and a separation pattern separating adjacent drain select plugs among the plurality of drain select plugs, wherein the separation pattern is in contact with a sidewall of each of the adjacent drain select plugs.

Semiconductor memory device and method of manufacturing the same

In a method of manufacturing a non-volatile memory device, a stack structure may be formed on a semiconductor substrate. The stack structure may be etched to form a contact hole through the stack structure. The contact hole may be filled with a gap-filling insulation layer. Ions may be implanted into a target position of the gap-filling insulation layer. The gap-filling insulation layer may be selectively removed to define a preliminary junction region. A junction region may be formed in the preliminary junction region.

Three-dimensional non-volatile memory device and method of manufacturing the same

In a method of manufacturing a non-volatile memory device, insulating layers and conductive gates may be alternately formed on a semiconductor substrate to form a stack structure. A contact hole may be formed through the stack structure. A channel layer may be formed on a surface of the contact hole. The contact hole may be filled with a gap-fill insulating layer. The gap-fill insulating layer may be etched by a target depth to define a preliminary junction region. The channel layer may be etched until a surface of the channel layer may correspond to a surface of an uppermost gate among the gates. Diffusion-preventing ions may be implanted into the channel layer. A capping layer with impurities may be formed in the preliminary junction region.

Method of manufacturing a three-dimensional non-volatile memory device

A semiconductor device includes: hole source patterns; electron source patterns located between adjacent hole source patterns; a stack structure over the hole source patterns and the electron source patterns; and channel layers penetrating the stack structure, wherein each channel layer is in contact with a corresponding hole source pattern and an electron source pattern adjacent to the corresponding hole source pattern.

Semiconductor device and manufacturing method thereof

In a method of programming a semiconductor memory device, during a standby period, a standby voltage is applied to word lines coupled to a plurality of memory cells included in a selected memory cell string, and, during a first program period, a first pre-bias voltage is applied to a word line coupled to at least one of programmed memory cells of the selected memory cell string. The first pre-bias voltage is greater than the standby voltage.

Method of programming semiconductor memory device

A method of operating the semiconductor device includes performing an erase operation on a plurality of memory cells, performing a back-tunneling operation by injecting electrons into a storage node from a gate electrode of a memory cell, selected among the plurality of memory cells, and performing a program operation by injecting electrons into the storage node from a channel layer of the selected memory cell.

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Gyeonggi-do, South Korea

Eun Mee Kwon