International Business Machines Corporation

Eun Kyung Lee

Yoonho Park

Mingu Kang

Bilge Acun

Alessandro Morari

Seonghoon Woo

Giacomo Domeniconi

Paul William Coteus

Alper Buyuktosunoglu

Kyu-hyoun Kim

Seyoung Kim

Todd Jon Rosedahl

Bruce David D'Amora

I-Hsin Chung

Guojing Cong

Martha Broyles

Chih-Chieh Yang

Sukjay Chey

Jong Yoon Lee

An electronic circuit includes word lines; bit lines intersecting the word lines at a plurality of grid points; and resistive processing units located at the grid points. Baseline stochastic pulse input units are coupled to the word lines; differential stochastic pulse input units are coupled to the word lines; and bitline stochastic pulse input units are coupled to the bit lines. Control circuitry coupled to the pulse input units is configured to cause each of the baseline stochastic pulse input units to generate a baseline pulse train using base input data, each of the differential stochastic pulse input units to generate a differential pulse train using differential input data defining differences from the base input data, and each of the bitline stochastic pulse input units to generate a bitline pulse train using bit line input data. Neural network weights can thus be stored in the resistive processing units.

Enabling hierarchical data loading in a resistive processing unit (RPU) array for reduced communication cost

Techniques for performing improved machine learning using decision trees are disclosed. In one example, a system includes a plurality of decision tree structures, and configuration logic operatively coupled to the plurality of decision tree structures. The configuration logic selectively configures the plurality of decision tree structures to form at least one of: one or more combined decision tree structures, wherein a combined decision tree structure comprises multiple interconnected ones of the plurality of decision tree structures; and one or more individual decision tree structures, wherein an individual decision tree structure comprises a single one of the plurality of decision tree structures.

Machine learning accelerator with decision tree interconnects

A system comprises a floating-point computation unit configured to perform a dot-product operation in accordance with a first floating-point value and a second floating-point value, and detection logic operatively coupled to the floating-point computation unit. The detection logic is configured to compute a difference between fixed-point summations of exponent parts of the first floating-point value and the second floating-point value and, based on the computed difference, detect the presence of a condition prior to completion of the dot-product operation by the floating-point computation unit. In response to detection of the presence of the condition, the detection logic is further configured to cause the floating-point computation unit to avoid performing a subset of computations otherwise performed as part of the dot-product operation. Such techniques serve as a predictor that the avoided subset of computations would have resulted in a dot product of the two floating-point values being below a threshold value.

Floating-point computation with threshold prediction for artificial intelligence system

Based on historic job data, a computer processor can predict a configuration of a computer node for running a future computer job. The computer processor can pre-configure the computer node based on the predicted configuration. Responsive to receiving a submission of a job, the computer processor can launch the job on the pre-configured computer node.

Job-launch time reduction by node pre-configuration

A method for context-aware data mining of a text document includes receiving a list of words parsed and preprocessed from an input query; computing a related distributed embedding representation for each word in the list of words using a word embedding model of the text document being queried; aggregating the related distributed embedding representations of all words in the list of words to represent the input query with a single embedding, by using one of an average of all the related distributed embedding representations or a maximum of all the related distributed embedding representations; retrieving a ranked list of document segments of N lines that are similar to the aggregated word embedding representation of the query, where N is a positive integer provided by the user; and returning the list of retrieved segments to a user.

NLP-based context-aware log mining for troubleshooting

Original data for machine learning training can be received. The original data can be divided into baseline data and difference data. The baseline data and the difference data can be stored in different memory devices of the memory hierarchy associated with a computer, wherein the baseline data is stored in a first memory device having faster access speed than a second memory device in which the difference data is stored. The baseline data and the difference data can be loaded from the different memory devices. The original data can be reconstructed from the baseline data and the difference data. The reconstructed original data can be fed to a machine learning model to train the machine learning model.

Similarity-based hierarchical data loading for machine learning training

An application to run on a hardware processor comprising a plurality of cores may be received. Hardware resource utilization data associated with the application may be obtained. A trained neural network with the hardware resource utilization data associated with the application is run, the trained neural network predicting core temperature associated with running the application on a core of the hardware processor. Based on the core temperature predicted by the trained neural network, the plurality of cores may be controlled to run selective tasks associated with the application.

Learning-based thermal estimation in multicore architecture

A system is provided for error resiliency in a bit serial computation. A delay monitor enforces an overall processing duration threshold for bit-serial processing all iterations for the bit serial computation, while determining a threshold for processing each iteration. At least some iterations correspond to a respective bit in an input bit sequence. A clock generator generates a clock signal for controlling a performance of the iterations. Each of iteration units perform a particular iteration, starting with a Most Significant Bit (MSB) of the input bit sequence and continuing in descending bit significant order, and by selectively increasing the threshold for at least one iteration while skipping from processing at least one subsequent iteration whose iteration-level processing duration exceeds a remaining amount of an overall processing duration for all iterations, responsive to the at least one iteration requiring more time to complete than a current value of the threshold.

Bit-serial computation with dynamic frequency modulation for error resiliency in neural network

A power controller that controls power usage of a heterogeneous system is provided. The power controller receives a power usage cap for a heterogeneous system that includes multiple components. The power controller assigns priorities that respectively correspond to the multiple components. The power controller assigns power shifting ratios that respectively correspond to the multiple components. The power controller adjusts a total power usage of the multiple components to be within a threshold of the power usage cap by adjusting the power usage of individual components in a sequence defined by the assigned priorities. The power controller shifts a power usage from a first-priority component to a second-priority component (and so on) according to the assigned power shifting ratios.

Power shifting among hardware components in heterogeneous system

Method and systems for generating an adjacency matrix A and a directional relation graph representing a relationship between one or more diagnostics. The adjacency matrix with all zero's is initialized. One or more entries in the adjacency matrix A are revised by, for each source diagnostic s, decreasing a corresponding count A(s,d) in the adjacency matrix A to decrease a corresponding directional relation in response to the diagnostic s failing and one or more other diagnostics d passing; increasing the corresponding count A(s,d) in the adjacency matrix A to increase the corresponding directional relation in response to the diagnostic s failing and one or more other diagnostics d failing; and maintaining a current value of the corresponding count A(s,d) in the adjacency matrix A in response to the diagnostic s passing or having no corresponding data. The directional relation graph is generated based on the adjacency matrix A.

Selective diagnostics for computing systems

Sub-components assembled into a computer are selected based on sub-component power efficiency levels (for example, low, medium, high) and/or anticipated usage of the computer. Multiple units of each type of sub-component (for example, a CPU) are tested to determine a power efficiency level of each unit. Computers in which sub-component efficiency levels are desired to match an overall computer efficiency level, receive sub-component units of corresponding efficiency level. Computers anticipated to run applications that make intensive use of a given type of sub-component receive the given units having a higher efficiency level. Computers anticipated to run applications that make little use of a given type of sub-component receive a physical unit having a lower efficiency level. Computers anticipated to run a wide variety of applications of no particular usage intensity for a given type of sub-component, receive a unit having an average efficiency level.

Power efficiency-aware node component assembly

An application to run on a computer node comprising a plurality of hardware components is received. Expected performance of the hardware components is received. A power shifting ratio associated with each of the plurality of hardware components for each phase of the application is determined. Power between the hardware components is dynamically shifted based on the power shifting ratio at different phases of the application.

Variation-aware intra-node power shifting among different hardware components

Aspects of the present invention disclose a method, computer program product, and system for scheduling an application. The method includes one or more processors receiving a task, the task includes instructions indicating desired nodes to perform the task through programs. The method further includes one or more processors identifying application characteristic information and node characteristic information associated with nodes within a data center composed of nodes. The application characteristic information includes resource utilization information for applications on nodes within the data center. The method further includes one or more processors determining that the nodes reach a threshold level of power consumption. The threshold level is a pre-set maximum amount of power utilized by a node within the data center. The method further includes one or more processors determining a node consuming an amount of power that is below a threshold level of power consumption in the data center.

Job scheduling based on node and application characteristics

A data-centric reduction method, system, and computer program product include configuring a similarity threshold and a correlation threshold for an entire data set from at least two back-end nodes, reducing the entire data set to a reduced data set from the at least two back-end nodes sent to a front-end node by removing data based on the similarity threshold and the correlation threshold, and after the front-end receives the reduced data set, reconstructing the entire data set from the reduced data set using the similarity threshold and correlation threshold.

Data-centric reduction network for cluster monitoring

A method, apparatus, and computer program product are provided for thermal- and spatial-aware task scheduling. The method may include monitoring a temperature for each core of a central processing unit having a plurality of cores; determining, from the monitoring, a set of hotspot cores from the plurality of cores determining temperature information and distance information for each hotspot core in the set of hotspot cores relative to each of the other cores on the central processing unit; calculating a placement metric for each core of the central processing unit based at least on the determined distance information and the determined temperature information; and scheduling a task by allocating the task to one or more cores of the central processing unit according to the placement metric.

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Bedford Corners, NY, United States of America

Eun Kyung Lee