Samsung Display Co., Ltd.

Eun Hye Park

Hyun Sook Kim

Seung-Ha Choi

Bo Sung Kim

Seung-Ho Jung

Chan Woo Yang

Doo Na Kim

Sho Yeon Kim

Byung Hwan Chu

Doo Hyoung Lee

June Whan Choi

A thin film transistor array panel includes: a gate line disposed on a substrate and including a first connection member of a gate driver region and a gate electrode of a display area, a gate insulating layer disposed on the substrate and having a first contact hole exposing the first connection member, a semiconductor layer disposed on a region of the gate insulating layer, a data line disposed on the gate insulating layer and the semiconductor layer and including a drain electrode, a source electrode, and a second connection member connected to the first connection member through the first contact hole, a passivation layer disposed on the data line, the source electrode, the drain electrode, and the second connection member, and a pixel electrode disposed on the passivation layer and electrically connected to the drain electrode. A horizontal width of the first contact hole ranges from 1 to 2 &#x3bc;m.

Thin film transistor array panel and method of manufacturing the panel

A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

Precursor composition of oxide semiconductor and thin film transistor substrate including oxide semiconductor

A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.

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Incheon, South Korea

Eun Hye Park