Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Intel Corporation

Samsung Sdi Co., Inc.

Samsung Mobile Display Co., Ltd.

Ls Cable & System Ltd.

Eun Ah Kim

Jong-Min Lee

Jeong Hyun Yi

Jin Ho Nam

Jongryul Jun

Jung-Bum Lim

Tae-Chul Jung

Alexey Fomin

Danbi Kang

Seog Chung Seo

Hwan Mook Kim

Kiseok Lee

Sang Ho Lee

Myeong Wuk Jang

Sunghee Han

Taejin Park

Ki Seok Lee

Sohyun Park

Sang Yeon Han

Yoo Sang Hwang

Jay-Bok Choi

Sergey Bezzateev

Hyo-Sub Kim

Jin-Hwan Chun

Chulkwon Park

Weon Il Jin

Keun Nam Kim

Sung Hee Han

Yun Ho Jeon

Seung Uk Han

Mikhail V Stepanov

Yong Seok Ahn

Sang Won Hyun

Yoosang Hwang

Daewon Kim

Keun Chan Oh

Kyung Min Kim

Su Jin Kim

Tae Hong Kim

Keunnam Kim

Byoung Joon Lee

Min Hee Lee

Min-Jae Kim

Min-Hee Kim

Eunjung Kim

Dongoh Kim

Eui Seok Kim

Dae Youb Kim

Wonchul Lee

Mi Suk Huh

Seong Ik Hong

Su Hyun Kim

Joon Seok Ahn

Jin Hyeong Lee

Si Heun Kim

Byoung-Joon Lee

Dong-Gi Seong

Byung Wook Kang

Jae Wook Yoo

Sue Jin Son

Sergei Bezzateev

Evgeny Linsky

Alexandra Afanasyeva

Jae Ik Lee

Jeongseop Shim

Ik Hyun Ryu

Gyungho Lee

Soyeong Kim

Alexandria Afanasyeva

Ja Young Lee

A semiconductor memory device is disclosed. The device may include first and second impurity regions provided in a substrate and spaced apart from each other, the second impurity region having a top surface higher than the first impurity region, a device isolation pattern interposed between the first and second impurity regions, a first contact plug, which is in contact with the first impurity region and has a bottom surface lower than the top surface of the second impurity region, a gap-fill insulating pattern interposed between the first contact plug and the second impurity region, a first protection spacer interposed between the gap-fill insulating pattern and the second impurity region, and a first spacer, which is in contact with a side surface of the first contact plug and the device isolation pattern and is interposed between the first protection spacer and the gap-fill insulating pattern.

Semiconductor memory device and method of fabricating the same

A semiconductor device includes a device isolation layer defining first and second active regions, a buried contact connected to the second active region, and first and second bit line structures disposed on the first and second active regions. Each of the first and second bit line structures comprises a bit line contact part and a bit line pass part. The bit line contact part is electrically connected to the first active region. The bit line pass part is disposed on the device isolation layer. A height of a lowest part of the buried contact is smaller than a height of a lowest part of the bit line pass part. The height of the lowest part of the buried contact is greater than a height of a lowest part of the bit line contact part. A lower end of the bit line pass part is buried in the second active region.

Semiconductor device and method of fabricating the same

A semiconductor memory device includes; a first impurity region and a second impurity region spaced apart in a substrate, a device isolation pattern between the first impurity region and the second impurity region, a bit-line contact on the first impurity region, a storage node contact on the second impurity region and a dielectric pattern between the bit-line contact and the storage node contact. An upper part of a sidewall of the device isolation pattern has a first slope and a lower part of the sidewall of the device isolation pattern has a second slope different from the first slope.

Semiconductor memory device and method of fabricating same

Speaker

Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.

Capacitor structures, decoupling structures and semiconductor devices including the same

Disclosed are semiconductor devices and methods of manufacturing the same. The method comprises forming an active structure including a plurality of active patterns, a device isolation layer defining the active patterns, and a gate structure across the active patterns and extending in a first direction, forming a first mask pattern on the active structure, and forming a trench by using the first mask pattern as an etching mask to pattern the active structure. Forming the first mask pattern comprises forming in a first mask layer a plurality of first openings extending in a second direction intersecting the first direction, and forming in the first mask layer a plurality of second openings extending in a third direction intersecting the first and second directions.

Semiconductor device and method of manufacturing the same

A display device according to an embodiment of the present disclosure includes a display including an active area on which an image is displayed and a bezel covering edges of the display so that the bezel covers a part of the active area of the display. The bezel includes a transparent part that covers the part of the active area of the display and internally transports light emitted from the covered part of the active area of the display by reflecting the light, emitted from the covered part of the active area of the display, inside the transparent part and a reflection part including a reflection surface disposed parallel to one surface of the transparent part and reflecting light transmitted from the transparent part back into the transparent part.

Display device including lighting bezel

Provided is a method of authenticating and verifying data packet transmission, and apparatuses for performing the same. The method and corresponding apparatus are configured to encode data packets through erasure coding. The method and corresponding apparatus are also configured to generate authentication packets for the encoded data packets based on hash images of the encoded data packets.

Authenticating data packet based on hash image of the data packet in erasure coding-based data transmission

Provided is a communication method for an administration node in a content centric network (CCN). The communication method includes receiving a packet requesting deletion of an invalid content from a requesting node that detects the invalid content, generating a content revocation list including a name of the invalid content and a period of time over which the deletion is to be performed, and flooding a data packet including the content revocation list to the requesting node and a normal node included in the CCN. Also provided are related communications methods for a receiving node and a normal node, as well as the nodes themselves.

Communication method of administration node, requesting node, and normal node for deleting invalid content using content revocation list in content centric network

Provided are apparatuses and methods of generating and verifying signature information for data authentication. A method of verifying signature information may involves receiving signature information with respect to a predetermined number of data segments from a transmitter, constructing a hash tree based on the signature information, and verifying a validity of the signature information, by verifying trapdoor hash values using a root hash value of the constructed hash tree.

Method and apparatus of data authentication

A liquid crystal composition including a first class including a polar liquid crystal compound having at least one fluorine atom and a second class compound including a neutral liquid crystal compound, in which the first class compound includes a first subclass compound having a dielectric anisotropy (&#x394;&#x2208;) of 15 to 21 and a second subclass compound having a dielectric anisotropy (&#x394;&#x2208;) of 5 to 15, and the first sub-class compound includes a liquid crystal compound expressed by the following Chemical Formula 1, in which R is an alkyl group or an alkenyl group.

Liquid crystal composition and liquid crystal display comprising the same

Growing community of inventors

Seoul, South Korea

Eun Ah Kim