International Business Machines Corporation

Eula Faye Tolentino

Dung Q Nguyen

Jing Zhang

Christopher M Mueller

Brian David Barrick

David R Terry

Kurt Alan Feiste

Steven J Battle

Joshua W Bowman

Tien T Tran

Techniques are disclosed for restoring register data in a processor. In one embodiment, a method includes receiving an instruction to flush one or more general purpose registers (GPRs) in a processor. The method also includes determining history buffer entries of a history buffer to be restored to the one or more GPRs. The method includes creating a mask vector that indicates which history buffer entries will be restored to the one or more GPRs. The method further includes restoring the indicated history buffer entries to the one or more GPRs. As each indicated history buffer entry is restored, the method includes updating the mask vector to indicate which history buffer entries have been restored.

Direct register restore mechanism for distributed history buffers

Supplemental instruction dispatch may be used in some instances in a parallel slice processor to dispatch additional instructions, referred to as supplemental instructions, to supplemental instruction ports of execution slices and using primary instruction ports of one or more execution slices to supply one or more source operands for such supplemental instructions. In addition, in some instances, in lieu of or in addition to supplemental instruction dispatch, selective slice partitioning may be used to selectively partition groups of execution slices in a parallel slice processor based upon a threading mode within which such execution slices are executing.

Execution slice with supplemental instruction port for an instruction using a source operand from another instruction port

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Austin, TX, United States of America

Eula Faye Tolentino