General Electric Company

Eugene W Bergholz

John E Celek

Edward W Andrews

Royal R Morse, Iii

Steven T Vaughn

Michael A Peters

Barry T Kavoussi

Lewis J Gohde

A multiple channel parallel transfer digital disk recorder is used to record digitized circular video images at the video frame rate. The digital pixel values for each image frame are written onto successive pages of a disk buffer memory (DBM) under video frame timing and are read from memory and written on disk under disk timing. When the last page image of the DBM is reached readout is switched back to the first page which is now filled with a frame of image data. Reading image data from disk and writing into successive pages of the DBM is done similarly. Only DBM locations containing pixels representative of actual image data within the circular boundaries of the image are addressed when reading from DBM and writing on disk and when reading from disk and writing onto DBM. Adjacent pixels in the image having predetermined bit lengths are written on disk with their bits in series. A group of adjacent pixels are written simultaneously and in coincident locations on the several disks under clocks that are derived from disk. A circuit is provided for correcting for the skew that can exist as a result of asynchronism between the timing of the disk. A programmable serial-to-parallel converter is provided for converting the serially recorded pixel of any bit length back to parallel bits of the same number as before they were serialized. The commands for the disk drive such as read, write, step and select cylinder are put in registers in response to occurrence of a disk index pulse for one multiple disk rotation and they are shifted to corresponding registers and are ready for execution when the next index pulse occurs so what is to be done by the disk drive during the next disk rotation is anticipated.

Storing video images on disk using video time base and retrieving the

In a digital fluorography system a television (TV) camera converts x-ray images to analog video signals that are converted to digital pixel words in an analog-to-digital converter (ADC). The sync signals for the TV camera and the sample clock signals for the ADC are derived from a novel resettable crystal controlled sync generator. A phase-locked loop provides an ac reference signal at one-half power line frequency which is equivalent to TV frame rate. The sync generator is reset to start a new frame and an ensuing sequence of crystal controlled horizontal sync pulses only in response to occurrence of ac reference signals so every frame is in registration. A digital video processor (DVP) subtracts a mask image from each image in a sequence of images that are acquired while an x-ray contrast medium is appearing in and disappearing from a blood vessel. The resulting difference images are stored in analog video signal format in an analog video disk recorder. The DVP and, hence the horizontal and vertical sync signals recorded on disk for each frame are also locked to the ac reference signal and are independent of sync signals from the crystal controlled oscillator. A novel digital storage FIFO buffer system couples the digitized pixel data from the ADC to the DVP and compensates for the timing differences between them. During image reprocessing wherein recorded difference images are subtracted from a selected difference or substitute mask image, the sample clock for the ADC is derived from a phase-locked loop that is locked to the recorded horizontal sync signals so the sample clock is varied in correspondence with or modulated by the recorded sync signals.

Line-locked digital fluorography system

A method of controlling a digital video processor in a digital fluorography system wherein the electronic components of the processor are variously configured to perform math functions and manipulations on digital image data obtained in connection with carrying out x-ray examination procedures and the images are displayed on a television monitor or recorded. A system controller sends a complete recipe for a procedure to the memory of a microprocessor based CPU that controls the video processor. The latter CPU interprets the instructions and effects configurations and reconfigurations in the data paths of the video processor during television vertical blanking intervals.

Digital fluorographic processor control

Growing community of inventors

Dousman, WI, United States of America

Eugene W Bergholz