General Dynamics Corporation

Hughes Missile Systems Company

General Dynamics Corp., Pomona Division

Eugene Phillips

Garry N Hulderman

Richard J Swanson

William P Dugan

A millimeter wave device having a dielectric substrate with a pair of substantially parallel planar surfaces with at least one predetermined millimeter wave circuit pattern formed in a conductive layer located on at least one of the substrate surfaces. A substantially planar conductive channel plate is mounted adjacent the conductive layer on one substrate surface with the channel plate having an aperture overlying each circuit pattern formed in the conductive layer. A substantially planar conductive cover plate is mounted adjacent one of the channel plates so as to form a first cavity in the region defined by the substrate surface, the channel plate aperture and the cover plate The device may further include a second substantially planar conductive channel plate mounted adjacent the other one of the substrate surfaces with the second channel plate having an aperture corresponding to and aligned with the first channel plate aperture. A second substantially planar conductive cover plate is mounted adjacent the second channel plate so as to form a second cavity in the region defined by the other substrate surface, the second channel plate aperture and the second cover plate. A substantially planar conductive back plate may be mounted adjacent each cover plate to provide support to the device structure. For the production at large quantity, high yield devices, the channel plates, cover plates, and back plates are fabricated by precision techniques such as by photolithography with chemical milling, or electrodischarge machine wire saw fabrication techniques to achieve device high performance operation. In an alternate embodiment of the invention the channel plates, cover plates and back plates are integrally formed for combining photolithography and electroforming techniques.

Millimeter wave device and method of making

A millimeter wave device having a dielectric substrate with a pair of substantially parallel planar surfaces with at least one predetermined millimeter wave circuit pattern formed in a conductive layer located on at least one of the substrate surfaces. A substantially planar conductive channel plate is mounted adjacent the conductive layer on one substrate surface with the channel plate having an aperture overlying each circuit pattern formed in the conductive layer. A substantially planar conductive cover plate is mounted adjacent one of the channel plates so as to form a first cavity in the region defined by the substrate surface, the channel plate aperture and the cover plate. The device may further include a second substantially planar conductive channel plate mounted adjacent the other one of the substrate surfaces with the second channel plate having an aperture corresponding to and aligned with the first channel plate aperture. A second substantially planar conductive cover plate is mounted adjacent the second channel plate so as to form a second cavity in the region defined by the other substrate surface, the second channel plate aperture and the second cover plate. A substantially planar conductive back plate may be mounted adjacent each cover plate to provide support to the device structure. For the production of large quantity, high yield devices, the channel plates, cover plates, and back plates are fabricated by precision techniques such as by photolithography with chemical milling, or electrodischarge machine wire saw fabrication techniques to achieve device high performance operation. In an alternate embodiment of the invention the channel plates, cover plates and back plates are integrally formed by combining photolithography and electroforming techniques.

A method for making a millimeter wave device having a dielectric substrate with a pair of substantially parallel planar surfaces with at least one predetermined millimeter wave circuit pattern formed in a conductive layer located on at least one of the substrate surfaces. A substantially planar conductive channel plate is mounted adjacent the conductive layer on one substrate surface with the channel plate having an aperture overlying each circuit pattern formed in the conductive layer. A substantially planar conductive cover plate is mounted adjacent one of the channel plates so as to form a first cavity in the region defined by the substrate surface, the channel plate aperture and the cover plate. The device may further include a second substantially planar conductive channel plate mounted adjacent the other one of the substrate surfaces with the second channel plate having an aperture corresponding to and aligned with the first channel plate aperture. A second substantially planar conductive cover plate is mounted adjacent the second channel plate so as to form a second cavity in the region defined by the other substrate surface, the second channel plate aperture and the second cover place. A substantially planar conductive back place may be mounted adjacent each cover plate to provide support to the device structure. For the production of large quantity, high yield devices, the channel places, cover plates, and back plates are fabricated by photolithography with chemical milling, to achieve device high performance operation. Alternatively the channel plates and back plates are integrally formed by combining photolithography and electroforming techniques.

A method for electroless overplating of a conductive metal on printed wiring circuitry components mounted upon a plastic substrate which eliminates deposit metal overgrowth upon the plastic substrate and plastic bonding materials. The substrate and printed wiring are treated by exposure to a tetrafluoromethane plasma environment to chemically passivate, or neutralize, the plastic or adhesive substrate surface areas prior to electroless plating of the printed circuitry elements, thus preventing the establishment of catalyzing ions on the plastic or adhesive surfaces and subsequent lay down of the deposited metal thereon.

Method of electroless plating employing plasma treatment

Carriers forming strips for semiconductor integrated circuit chips. The carrier consists basically of a flexible tape, such as a polyimide. A conductive sheet, such as a copper sheet, is initially prepared to form a lead circuit on one surface and a bump circuit on the other. This metal sheet may be gold plated. Subsequently, a layer of polyimide is applied to the lead circuit side and both the polyimide sheet and the opposite bump circuit are covered with a metal sheet, such as copper. A photoresist layer is put over the copper and is suitably illuminated and developed to provide apertures through which the copper can be etched to expose the polyimide sheet. This takes place over the windows or openings adjacent the bumps for the application of a heat ram as well as for the sprocket holes used for precisely aligning the carrier with the to-be-associated semiconductor chips. Finally, openings may also be provided to separate adjacent carrier strips from each other. The exposed polyimide layer is now removed by chemical milling. Subsequently the previously applied outer copper sheets are removed as by etching.

Bump circuits on tape utilizing chemical milling

A method for conditioning drilled holes in multilayer printed wiring boards by removing layers of smeared plastic and adhesive prior to metal plating through the holes for interconnecting conductive layers of the boards includes baking the drilled boards and etching the boards within a plasma reactor chamber, with a predetermined gas pressure, the plasma being created by an RF generator. At the end of a predetermined time period, the RF generator is deactivated and atmospheric air is admitted to the reactor chamber. The reactor chamber is then purged of gases and the printed wiring boards are removed.

Growing community of inventors

Diamond Bar, CA, United States of America

Eugene Phillips