Hewlett-packard Development Company, L.p.

Other

Taiwan Semiconductor Manufacturing Comp. Ltd.

Eugene J Mar

Dennis J Schloeman

Eric T Martin

Daryl E Anderson

Adam L Ghozeil

Mark H MacKenzie

David Maxfield

Andrew F Phillips

Matthew P Heineck

Mark H Mackenzie

A system is provided that includes first means for pre-charging a node to a first potential where the node coupled to a switch configured to control current through a firing resistor and second means for selectively discharging the node to a second potential across a path that has only one transistor between the node and the second potential.

Firing cell

A light modulator includes a control unit configured to receive an image input signal, and an array having a plurality of pixels arranged in a plurality of rows. The control unit is configured to provide a first address associated with the image input signal to the array in response to detecting a first mode of operation, and the control unit is configured to provide a second address associated with the image input signal to the array in response to detecting a second mode of operation. The array is configured to drive a first one of the plurality of rows in response to receiving the first address, and the array is configured to drive the first one of the plurality of rows and a second one of the plurality of rows in response to receiving the second address.

Address generation in a light modulator

A method and system for controlling a color of light output by a diffractive light device (DLD device). The color is determined by a gap voltage applied to the DLD device. During each of a number of time frames, one of a number of control bits in a control word is sent to bit line logic corresponding to the DLD device. Each of the control bits represents a gap voltage level. The applied gap voltage is then adjusted to the gap voltage level represented by the one of the number of the control bits.

Method and system for controlling the output of a diffractive light device

A dynamic memory cell for storing data in a display having at least one MEMS device for each pixel has at least two dynamic memory elements per pixel, including first and second dynamic memory elements, each including at least one capacitor, both of the first and second memory elements being electrically coupled to the MEMS device of a single pixel. A sense amplifier is configured to amplify the data signal and to latch data in response to a differential data signal and a clock signal, self-refreshing the data and loading data to the MEMS device as required.

Dynamic self-refresh display memory

A system includes logic configured for counting transitions between data on a bus and data to be put onto the bus. Where the counted transitions exceed a threshold, the data to be put onto the bus is complemented. As a result, complemented data is put on the bus where the threshold was exceeded and un-complemented data is put on the bus where the threshold was not exceeded.

Logic configured for complimenting data on a bus when threshold exceeded

A micro-mirror system has a closely spaced array of micro-mirror cells, a calibration timing circuit, and test circuitry. Each micro-mirror cell has a micro-mirror and a timing circuit. The timing circuit controls deflection of the micro-mirror. The micro-mirror is in close proximity with the timing circuit. The calibration timing circuit is like the timing circuits of the micro-mirror cells. The test circuitry tests a time constant of the calibration timing circuit.

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Corvallis, OR, United States of America

Eugene J Mar