International Business Machines Corporation

Eugene J Annunziata

Thomas E Stammely

Neal T Christensen

Kwang G Tan

James M Faress, Ii

Robert S James

A wiring methodology for attaching office machines to a communications network includes at least one central wiring facility or concentrator with lobe segments emanating or fanning out in a 'Star Fashion' configuration to terminal points within offices. A plurality of switch control elements are provided in the concentrator. When activated, each switch control element inserts a lobe segment and attached machines into the communications network. Lobe segments not in use are bypassed (disconnected) within the concentrator. A single station connector (SSC) can be used to increase the number of office machines that may be attached to a single lobe segment. In addition, the SSC may be used to configure a mobile Local Area Network (LAN) System without resorting to permanent wiring schemes.

Local area network station connector

A device, method and system for testing in situ the wiring between a data terminal equipment and a ring or similar type local area network having a loop conduction path with a plurality of data terminal equipment (DTE) coupled to said loop conduction path. The DTE is provided with a mechanism for generating d.c. current. The d.c. currents flow from the DTE through a length of interconnecting conductors and self-shorting connectors towards the loop conduction path. Current measuring devices monitor the current at the interconnecting conductors for imbalance current flow and/or over current. The presence of either a current imbalance and/or over current indicates a malfunctioning (short circuit, broken wire, etc.) in the wiring.

Terminal disconnect and media wire fault detect mechanism

In a multi-processor system which utilizes store-in-cache techniques, a queueing mechanism for insuring that all units that wish to interrogate a memory line will be permitted to interrogate the line. Backing store access requests for data that is contained in the cache of another processor are queued until they can be serviced. The access requests that pertain to particular data are issued from the queue on a first-in-first-out basis. No group of interrogating units will be able to lock out another unit that wishes to interrogate.

Backing store access coordination in a multi-processor system

A response priority circuit arrangement for determining the priority among simultaneous responses from different access-time levels L3 and L2 in a storage hierarchy to maintain nearly the same order among the simultaneous responses as the order of their storage access requests. The storage requests were put into an indexed slot in a hardware queue. The index of the assigned queue slot is sent to a basic storage module (BSM) part of the hierarchy which is selected by the storage address supplied by the processor making the storage request. The selected BSM will have the requested data either in its main memory part (L3) or in its high-speed buffer part (L2). The priority circuit arrangement has a separate group of AND gates for each hierarchy level L3 and L2. The groups are interlocked by a circuit which disables the L2 group if any AND gate is enabled in the L3 group. Only one AND gate can be enabled in both L3 and L2 groups. When simultaneous responses are signalled from the L3 and L2 levels, the L3 gate is given priority since the L3 response resulted from an earlier request than the L2 response. The output of the enabled AND gate indicates the index of the slot in the queue which contains the request matching the response given priority. A bus connection can then be made using that slot's information for the data transfer between the selected BSM and the requesting processor.

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Cary, NC, United States of America

Eugene J Annunziata