Rca Inc.

Eugene D Savoye

Lloyd F Wallace

Walter F Kosonocky

Charles M Tomasetti

Donald F Battson

Thomas William Edwards

Charge integration is selectively interrupted in a semiconductor imager with thinned substrate, by modulating the electric field normal to its back-illuminated surface. This suppresses smear generated during field transfer in certain types of imager when exposed to high-energy images, for example. The thinned substrate is cemented with an electrically insulating epoxy to a glass backing plate bearing a transparent electrode, the potential on which is varied to modulate the drift field.

Interrupting charge integration in semiconductor imagers exposed to

Significant reductions in transfer smear for charge sweep device imagers is made possible by performing the charge sweep operation during only the line retrace period of the operating cycle of the imager. Complete elimination of transfer smear is then possible by using an optical means for blocking the imager from incident illumination during said line retrace periods.

Transfer smear reduction for charge sweep device imagers

An imaging array of the charge transfer type having improved sensitivity is disclosed. The array includes a plurality of substantially parallel charge transfer channels with channel stops therebetween which extend a distance into a semiconductor body. At least some of the channel stops have blooming drains therein for the removal of excess photogenerated charge. The improvement comprises potential barrier means which constrain electrical charge generated by absorption of light in the body to flow into the channels while preventing the loss of such charge by direct flow to the blooming drains. Potential barrier means include buried barrier regions extending a further distance into the body from those channel stops having blooming drain regions therein. The invention also includes an improved method of forming this array wherein the improvement comprises forming buried barrier regions containing a greater concentration of conductivity modifiers than the channel stops after the blooming drains are formed.

Method of making an imaging array having a higher sensitivity

Back-illuminated CCD imagers of interline transfer type are made possible by deep, highly doped implant regions which bury the CCDs with respect to the back-illuminated surfaces of the imager substrates. Transfer smear caused by photoconversion in the CCD charge transfer channels must be suppressed in certain of these back-illuminated CCD imagers of interline transfer type, and suitable suppression methods are described.

Back-illuminated CCD imagers of interline transfer type

An imaging array of the charge transfer type having improved sensitivity is disclosed. The array includes a plurality of substantially parallel charge transfer channels with channel stops therebetween which extend a distance into a semiconductor body. At least some of the channel stops have blooming drains therein for the removal of excess photogenerated charge. The improvement comprises potential barrier means which constrain electrical charge generated by absorption of light in the body to flow into the channels while preventing the loss of such charge by direct flow to the blooming drains. Potential barrier means include buried barrier regions extending a further distance into the body from those channel stops having blooming drain regions therein.

Imaging array having higher sensitivity and a method of making the same

A CCD imager of field transfer type having an image register statically clocked during image integration in a number of phases greater than it is dynamically clocked with during field transfer to a field storage register, when the image register and the field storage register are clocked in synchronous phase with each other.

CCD imager with photoconversion in an image register clocked with a

An imaging device includes a wafer of single crystal semiconductor material having a first surface with an input surfacing region which extends into the wafer from the first surface and a second surface with a charge storage portion which includes a plurality of discrete charge storing regions which extend into the wafer of the second surface. The wafer includes a potential barrier within the input signal sensing portion for controlling blooming. The wafer is improved by including a passivation region within the input sensing portion for stabilizing the energy level of the conductivity band of the minority carriers at the Fermi energy level of the semiconductor wafer. Additionally, an electrical leakage reduction region extends into the wafer from the second surface. The leakage reduction region is contiguous with each of the discrete charge storage regions.

Imaging device having improved high temperature performance

Field-rate flicker is suppressed in a CCD imager having a three-phase operated image register provided interlacing by integrating odd-numbered fields with only the first clock phase high and even-numbered fields with only the second and third clock phases high. The flicker is suppressed by making the gate electrodes in the A register receiving the second and third clock phases of equal lengths, half that of the gate electrodes receiving the first clock phase.

Overcoming flicker in field-interlaced CCD imagers with three-phase

A target for vidicons and image intensifier tubes include a potential barrier less than about 1500 A from an input signal sensing surface. The targets also include various passivation means for stabilizing the energy level configuration along the input signal sensing surface by substantially fixing the valence or conduction band along that surface relative to the Fermi level.

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Lancaster, PA, United States of America

Eugene D Savoye