Samsung Electronics Co., Ltd.

Eu-Ro Joe

Min-kyu Song

Seong-won Kim

Geun-Soon Kang

Energy economized pass-transistor logic circuit and full adder using the

A CMOS output buffer circuit includes a predriving circuit which generates two predriving signals, a main driving circuit which has a plurality of parallel connected pull-up transistors and a plurality of parallel connected pull-down transistors, and a sequential driving circuit which provides sequential pull-up and pull-down driving signals to the pull-up and pull-down transistors, respectively. The main driving circuit generates the output signal according to the sequential pull-up or pull-down driving signals, whereby the output signal is developed step by step into either the power supply potential or the ground potential. In the manner, any spike in the switching current is considerably mitigated, thereby reducing switching noise.

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Seoul, South Korea

Eu-Ro Joe