Skhynix Inc.

Eu Joon Byun

Hye Mi Kang

Byung Jun Kim

Jung Woo Kim

Hyun Tae Kim

Jea Young Zhang

Embodiments of the present disclosure relate to a memory controller and operating method thereof. According to embodiments of the present disclosure, the memory controller may generate a fused linked list which includes information of a plurality of write commands received from a host and a plurality of synchronization commands requesting a synchronization operation, and control the synchronization operation for one or more of the plurality of write commands based on the fused linked list.

Memory controller controlling synchronization operation based on fused linked list and operating method thereof

An electronic device includes an external device configured to determine a first performance index on the basis of at least one of a power level and a temperature signal, to put the first performance index into a command, and to output the command. The electronic device also includes a storage component including a plurality of memory dies. The electronic device further includes a memory controller configured to provide the temperature signal to the external device at a set transmission period, and to control the storage component to process the command by simultaneously operating the number of memory dies corresponding to the first performance index as the command is received.

Electronic apparatus, data storage device therefor, and operating method thereof

A memory system, a memory controller, and an operating method of the memory system are provided. The memory system may include a memory device including a first type memory block and a second type memory block and a memory controller configured to determine, when receiving a command to set a read boost mode for the target logical address, whether the data corresponding to the target logical address can be copied from the first type memory block to the second type memory block, and copy the data corresponding to the target logical address from the first type memory block to the second type memory block.

Memory system, memory controller and operating method of the memory system operating as read boost mode

A memory system that includes a system protection function implemented by using a double-map scheme, a memory controller, and operation methods thereof are disclosed. The memory system includes a memory device and a memory controller. The memory device includes a plurality of nonvolatile memory cells corresponding to a plurality of physical addresses respectively. The memory controller controls the memory device and uses a first map and a second map. The first map includes physical address mapping information based on a logical address for a physical address where first-type data is stored. The second map includes physical address mapping information based on a logical address for a physical address where second-type data is stored.

Memory system, memory controller and operation method thereof

A data processing system may include: a memory system comprising a memory device including a plurality of memory blocks; and a host suitable for dividing the memory device into a plurality of logical blocks, and including a plurality of segments each constituted by at least some of the plurality of logical blocks. The host may select a victim segment based on the number of the valid logical blocks corresponding to each of the memory blocks, and perform segment recycling on the victim segment, and one or more memory blocks may be invalidated by the segment recycling.

Apparatus and method for increasing operation efficiency in data processing system

The present technology relates to a storage device. According to the present technology, a memory controller controlling a memory device including a plurality of memory blocks may include an operation controller and a lifetime information controller. The operation controller may control the memory device to receive a write request from a host and perform a write operation on a selected memory block among the plurality of memory blocks. The lifetime information controller may generate lifetime information including a lifetime level of the selected memory block based on an erase and write count of the selected memory block.

Storage device and method of operating the same

A memory system may include: a nonvolatile memory device comprising a plurality of memory regions; and a controller in communication with the nonvolatile memory device to control operations of the nonvolatile memory device and configured to: receive a first write request including a first logical address and a second logical address; determine a duplicate physical address mapped to the second logical address; and selectively map the first logical address to the duplicate physical address based on a duplicate count corresponding to the duplicate physical address.

Memory system, operating method thereof, and data processing system for processing duplicate data

Disclosed are a data processing system comprising: a memory system for providing a host with a memory map segment including map pieces; and the host for storing the memory map segment as a host map segment and converting a logical address into a physical address using the host map segment. The memory system stores changed map pieces in a map cache, inserts the changed map pieces in a response to a first command, and provides the host with the response. The host updates the host map segment based on the changed map pieces. When a read command includes a logical address and a physical address, the memory system accesses a memory device using the physical address of the read command according to whether the logical address of the read command is stored in the map cache.

Memory system, data processing system including the same, and operating method thereof

A memory controller for controlling a memory device which stores logical-to-physical (L2P) segments includes a map data storage and a map manager. The map data storage stores a plurality of physical-to-logical (P2L) segments including mapping information between a physical address of the memory device in which write data is to be stored and a logical address received from a host, in response to a write request received from the host. The map manager updates the L2P segments stored in the memory device, based on target P2L segments corresponding to a write command provided to the memory device, which have a higher priority than the other P2L segments among the plurality of P2L segments. Each of L2P segments includes mapping information between a logical address and a physical address of data stored in the memory device.

Memory controller managing map data and operating method thereof

A data storage apparatus includes storage including a plurality of memory blocks and a controller configured to set an attribute of each of the memory blocks as a random memory block or a sequential memory block, and to manage validity of map data for data stored in each of the memory blocks using a map segment bitmap. The controller configures at least one memory block set by combining a set number of memory blocks, as a housekeeping event is triggered, and selects a victim block set from the at least one memory block set based on continuity of a logical address, or a number of valid map data, or both.

Data storage apparatus and operating method thereof

Provided herein may be a memory system and a method of operating the same. The memory system may include a host configured to generate and output a host command and a host address and to receive and store host map data, a controller configured to store map data, generate an internal command in response to the host command, and map the host address to an internal address based on the map data, and a memory device configured to perform an operation in response to the internal command and the internal address, wherein the controller is configured to load, when the map data corresponding to the host address is not stored in the controller, new map data into a map data storage area storing map data that is identical to the host map data.

Memory system for storing map data in host memory and operating method of the same

Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may fetch a first command from the host into a command queue, suspend execution of the first command when receiving a lock request for the first command from the host, and resume the execution of the first command when receiving an unlock request for the first command or after the first command is suspended for an amount of time corresponding to a suspend time value transmitted together with the lock request.

Memory system for suspending and resuming execution of command according to lock or unlock request, and operating method thereof

A memory system includes a storage medium and a controller. The storage medium includes a plurality of physical regions. The controller maps logical regions which are configured by a host device, to the physical regions, and performs in response to a write request for a target logical region, a write operation on a physical region mapped to the target logical region. The controller updates in response to the write request, a write status corresponding to the target logical region within a write status table.

Memory system and controller for managing write status

Disclosed is a memory system including: a memory device including a plurality of memory blocks; an address management component suitable for generating an address map table by sequentially mapping a logical address of write data to physical addresses of the memory blocks, in response to a write command; and a read/write control component suitable for writing the write data to a super memory block including pages of each of the memory blocks, based on the address map table, wherein the address management component maps a logical address of invalidation data which is designated by a host, to a physical address of a first memory block of the memory blocks in the address map table.

Growing community of inventors

Gyeonggi-do, South Korea

Eu Joon Byun