Raytheon Company

Ethan Santosh Heinrich

Alberto F Viscarra

Chad E Patterson

Michael M Fitzgibbon

David T Winslow

Kevin C Rolston

Samuel Doug Tonomura

Rosalio S Vidaurri

Duke Quach

Melvin S Campbell

Angelo M Puzella

John G Heston

Joseph R Ellsworth

Craig H McCordic

John B Francis

Dennis W Mercier

Dimitry Zarkh

Mark Ackerman

Todd E Southard

John Sangiolo

Stephen E Sox

Cynthia Y Hang

Anthony M Petrucelli

Jennifer G Wensel

An apparatus includes a coldplate configured to be thermally coupled to a structure to be cooled and to remove thermal energy from the structure. The coldplate includes (i) first and second outer layers having at least one first material and (ii) a third layer embedded in the outer layers and having at least one second material. The first and second materials have different coefficients of thermal expansion (CTEs). The third layer is embedded non-uniformly in the outer layers so that different zones of the coldplate have different local CTEs. The third layer may include openings extending through the second material(s), and projections of the first material(s) from at least one of the first and second outer layers may partially or completely fill the openings. The first and second outer layers may include aluminum or an aluminum alloy, and the third layer may include aluminum silicon carbide or thermal pyrolytic graphite.

Tailored coldplate geometries for forming multiple coefficient of thermal expansion (CTE) zones

A coaxial electrical interconnect is disclosed. The coaxial electrical interconnect can include an inner conductor including an electrically conductive spring probe. The coaxial electrical interconnect can also include an outer conductor including a plurality of electrically conductive spring probes disposed about the inner conductor. Each spring probe can have a barrel and a plunger biased out of the barrel. The plunger can have a first plunger portion external to the barrel and a second plunger portion disposed partially in the barrel. The first and second plunger portions can have different diameters. A barrel of the spring probe of the inner conductor can be located proximate a plunger of at least one of the spring probes of the outer conductor.

Coaxial electrical interconnect

An radio-frequency (RF) interposer enables low-cost, high-performance RF interconnection of two or more large-area printed wiring boards (PWBs). The RF interposer may be provided as a multi-port coaxial structure embedded in a metal (or metalized) carrier. The RF interposer may include one or more conductive shims having spring fingers to provide contact across air-gaps between a PWB RF ground plane and a ground plane of the RF interposer. Retractable pins may be used as the coaxial transmission line center conductors. The RF interposer may be provided as an N&#xd7;M grid of unit cells each having one or more RF ports and a cavities to provide clearance for a PWB component.

Eggcrate radio frequency interposer

An integrated circuit system having: (A) a semiconductor chip with a signal strip conductor disposed on an upper surface of the chip; an active semiconductor device disposed of the upper surface of the chip electrically connected to the signal strip conductor; and a first ground plane conductor disposed on a bottom surface of the chip disposed under the signal strip conductor; and (B) a support structure having: a second ground plane disposed over, and separated from, the signal strip conductor by a dielectric region between the second ground plane and the signal strip conductor on the chip; a signal contact disposed on the bottom surface of the support structure displaced, electrically insulated, from the second ground plane conductor, and electrically connected to a portion of the signal strip conductor. The signal strip conductor, the first ground plane conductor, and the second ground plane conductor provide a stripline microwave transmission line.

Integrated circuit system having stripline structure

A fastener assembly including an elongate fastener adapted to extend through a chamber having a longitudinal axis, a first end and a second end; a first seal disposed at least partially at the first end of the fastener to prevent leakage of fluid from the chamber; and a second seal disposed at least partially at the second end of the fastener to prevent leakage of fluid from the chamber. In a specific embodiment, the first and second seals are conical seals and a third seal is provided by a gasket. The invention also provides a method for securing a fluid filled chamber to a surface by using embodiments of the fastener assembly.

Fastener with bilateral seal for liquid immersion cooling applications

A process for fabricating an origami formed antenna radiating structure is provided. In one embodiment, the invention relates to a process for precisely fabricating a radio frequency (RF) antenna structure, the process including providing a flexible circuit substrate, forming a plurality of parallel channels in the flexible circuit substrate in a first direction, mounting the flexible substrate to a precision die, pressing the flexible substrate into the precision die using an elastomeric material thereby sandwiching the flexible substrate between the elastomeric material and the precision die, and applying heat to the flexible substrate sandwiched between the elastomeric material and the precision die.

Process for forming channels in a flexible circuit substrate using an elongated wedge and a channel shaped receptacle

Process for fabricating an origami formed antenna radiating structure

A system for improving flip chip performance is provided. In one embodiment, the invention relates to an assembly configured to improve performance of a flip chip device, the assembly including a semiconductor die having an active surface and a back surface, the active surface including a plurality of conductive pads, an interposer substrate having a first surface in electrical contact with the active surface of the semiconductor die and a second surface, a space between the active surface of the semiconductor die and the first surface of the interposer substrate, where the space is essentially free of underfill material, and a carrier substrate having a top surface in electrical contact with the second surface of the interposer.

System for improving flip chip performance

Growing community of inventors

San Pedro, CA, United States of America

Ethan Santosh Heinrich