Hewlett-packard Development Company, L.p.

Erwin Oertli

Michael S Schlansker

Boon Yong Ang

Jean-Francois C Collard

Norman Paul Jouppi

Rajan Mathew Lukose

Thomas Lee Rodeheffer

Joshua Rogers Tyler

Norm Jouppi

Systems and methods for providing network interface controllers (NICs) with memory-mapped buffers are described. A processing system includes a plurality of processing cells, each including at least one processor and at least one system memory. A NIC is associated with each of the processing cells for transmitting and receiving data between the processing cells. Each of the cells further includes a memory interconnect to which the NIC is directly connected and the NIC includes at least one memory-mapped buffer.

Memory-mapped buffers for network interface controllers

A computer system is provided including a central processing unit having an internal cache, a memory controller is coupled to the central processing unit, and a closely coupled peripheral is coupled to the central processing unit. A coherent interconnection may exist between the internal cache and both the memory controller and the closely coupled peripheral, wherein the coherent interconnection is a bus.

Computer system with coherent interconnection

A virtual network interface system with memory management is provided, including a network interface controller having a memory with a memory credit and a flow-control for managing the network interface controller. A computer cluster is linked to the network interface controller for exchanging the memory credit with the network interface controller.

Virtual network interface system with memory management

A system and method for offsetting printing costs. Specifically, the method includes collecting user information about a user and generating a user profile based on the user information. The user profile is stored such that the user profile is used to achieve delivery of data that is targeted to the user based on the user profile without requiring a release of user information in the user profile. At least one offer for the delivery of data is presented to the user. The data is targeted to the user based on the user profile. Thereafter, the method determines that an item of the data presented to the user has been printed. An incentive is received for printing the item.

Method and system for offsetting printing costs in a system for targeted data delivery

Methods and systems for performing direct memory access (DMA) transfers are described. An invalidate queue (or other storage device) contains an entry associated with a DMA transfer in progress. If the invalidate queue detects an invalidation of a memory page associated with that entry, then it is marked invalid. If the entry is marked invalid during the DMA transfer, then that DMA transfer is aborted. This enables, among other things, DMA transfers to unpinned virtual memory.

DMA access systems and methods

A computer system is provided including a computer having a bus coupled to a computer system memory with a user buffer allocated therein. A network interface controller is coupled between the bus and a network. A retransmit buffer is coupled to the computer system memory, a transmit/receive buffer coupled to the computer system memory, and a retransmit direct memory access is within the network interface controller for moving data between the user buffer and the transmit/receive buffer, the retransmit buffer, or both as well as for moving the data to the network.

Computer system with network interface retransmit

A computer system with concurrent direct memory access is provided including a computer node having a processor interface bus and a cut-through network interface controller installed on the processor interface bus. A data transfer is initiated through the cut-through network interface controller by starting a direct memory access to move data from a memory to a transmit buffer in the cut-through network interface controller and a network interface controller physical interface transmitting the data, to the computer node attached to a reliable network, before all of the data is in the transmit buffer.

Computer system with concurrent direct memory access

A technique includes identifying an address of a head end of a queue and monitoring a coherent interconnect to identify a data transfer that is communicated by a producer, which targets the address. The technique includes storing the data of the data transfer in the queue and selectively storing at least a portion of the data in a head-of-queue cache memory based at least in part on whether the monitoring identifies the address. At least a portion of the data is selectively retrieved from the head-of-queue cache memory instead of from the queue for transmission to a consumer.

Head of queue cache for communication interfaces

Systems and methods for improving scrubbing techniques are provided. In one aspect, the error correction code for a memory line is strengthened by reorganizing the memory line into distinct portions and providing an error code set that includes a distinct error code for each portion of the memory line. In another aspect of the invention, the scan rate is effectively increased by moving memory scrubbing functionality into the memory system and distributing it among a number of subcomponents that can operate scrubbing functions in parallel. The effective scan rate increase reduces the probability of failure for any given ECC strength.

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Mountain View, CA, United States of America

Erwin Oertli