Thomson-csf

Thomson Composants Microondes

Thomson-csf Semiconducteurs Specifiques

Ernesto Perea

Jean-Yves Danckaert

Daniel Delagebeaudeuf

John Magarshack

Georges Bert

Maurice Gloanec

Erhard Kohn

Dimitrios Pavlidis

Disclosed is a system with at least two complementary transistors, having n and p channels but comprising a heterostructure of junctions between III-V group materials. In order to balance the threshold voltages in the two channels, namely the n (2DEG) and p (2DHG) channels, at least two p and n delta doped layers are included in two layers of the heterostructure, at levels included between the channels (2DEG, 2DHG) and the gate electrodes. The n delta doped layer is then removed by localized etching right above the p channel transistor. Application to fast logic circuits.

Semiconductor device with complementary transistors

This interface constitutes an adaptation of the output signals of a first circuit, made of silicon for example, to the limit values of the input signals in a second digital circuit, made of GaAs for example. It includes a first stage (A) consisting of two parallel-mounted shifters, in which the input signal (E) and a reference (Ref) are shifted. A second stage (B), of the BFL type, compares these two values and a third stage (C) regenerates and amplifies the signals. A fourth stage (D) may give a complementary value. This interface is integrated into the chip of the second digital circuit which is made of GaAs.

Interface circuit between two circuits of different logic types

This interface constitutes a matching of the output signals of a first circuit, made of GaAs for example, with the limit values of the input signals of a second digital circuit, made of silicon for example. It has a current amplifier which receives the output signal of the GaAs circuit. The voltages at the high level are controlled by a diode in series with a transistor which is then on. At the low level, the transistor is off, and it is two diodes, in parallel with the transistor, that control the output voltage. This interface is integrated into the chip of the digital circuit, made of GaAs. Single figure.

Output interface circuit between two circuits of different natures

The invention relates to a variable capacitance element operating in the ultra-high frequency range. In order to integrate this element on to an integrated circuit chip, the element is designed so that the control voltage does not interfere with the ultra-high frequency signal and has neither filters nor shock chokes which are not integrable. The element according to the invention utilizes the junction capacitances variation of at least one diode, reverse-biased by a voltage across a resistor, the high frequency signal being at the diode anode. The element construction comprises an active zone in a semiinsulating substrate. Two metallizations partly cover the active zone and form therewith at least one diode. A projection to the active zone forms the resistor, to which is applied the control voltage. The diodes are p-n junctions of schottky diodes. The semiconductor material is Si or from the III-V group. Application to oscillators, filters, phase shifters, etc. in ultra-high frequency equipment.

Variable capacitance element controllable by a D.C. voltage

A bistable logic device, of the RSTT type, operating up to X band. The bistable logic device is organized into three stages: an input stage of four NOR operators (21, 31, 41, 51), a second stage of two OR operators (61, 71) and an output stage of two OR operators (62, 72). Each NOR operator of the input stage drives in parallel an OR operator of the second stage and an OR operator of the output stage. Each of the four OR operators are fed back to an input of one of the four NOR operators of the input stage. The organization in logic NOR/OR form makes it possible to use faster single gate transistors. The present invention may be particularly useful to frequency dividers for interfacing between signals at GHz frequency and measurement and control circuits at MHz frequency.

Growing community of inventors

Gif Sur Yvette, France

Ernesto Perea