Motorola Corporation

Akhan Semiconductor, Inc.

Google Inc.

Freescale Semiconductor,inc.

Motorola Mobility LLC

Ernest Schirmann

Marino J Martinez

Adam Khan

Julio C Costa

Kiran Kumar Kovi

Armin Werner Klomsdorf

William Alberth

Olin L Hartin

Adolfo C Reyes

Robert T Love

Gordon M Grivna

Saied N Tehrani

Mariam G Sadaka

Herbert Goronkin

Dale Gerard Schwent

Nyles Wynn Cody

Charles E Weitzel

Jenn-Hwa Huang

Robert D Polak

Thomas D Nagode

Francis W Forest

Colby Greg Rampley

Robert S Trocke

Lawrence S Klingbeil, Jr

Priya Raman

Elizabeth C Glass

Mark R Wilson

Clark Conrad

Ryan J Geodken

Disclosed herein is a system and method for transistor pathogen virus detector in which one embodiment may include a substrate layer, a silicon dioxide layer on the substrate layer, a nanocrystalline diamond layer on the silicon dioxide layer, a graphene oxide layer on the nanocrystalline diamond layer, fluorinated graphene oxide portions; and a linker layer, the linker layer including a plurality of pathogen receptors.

System and method for transistor pathogen detector

A transparent display includes a display including a transparent substrate and a patterned diamond layer formed on the transparent substrate to at least in part define a diamond waveguide. At least two electronic devices can be connected by the diamond waveguide, and can include a sensor, a transducer, or electronic circuitry, including communication, control, or data processing electronic circuitry.

Monolithically integrated waveguide sensors on diamond display glass system and method

A broad band mirror system and method, wherein the system includes a mechanical substrate layer, a reflective metal layer on the mechanical substrate level, and a diamond layer, and the method includes the steps of selecting a sacrificial substrate layer, depositing a diamond layer on the substrate layer, smoothing a first surface of the diamond layer, depositing a reflective metal layer on the diamond layer, bonding a mechanical substrate to the diamond layer, removing the sacrificial substrate level, and smoothing a second diamond surface.

Diamond broad band mirror system and method

An adaptive power amplifier that may be used in a wireless communication device is configured to adjust its load line or output impedance, the number of active amplifier cells in each amplification stage, the bias of the active amplifiers, and the supply voltage input capacitive load in accordance with a supply voltage modulation type provided to the power amplifier. The supply voltage modulation types include ET, APT, DC-DC, dual, multi-state or fixed voltage supply voltages. A supply voltage converter, signaled by a baseband processor, generates the selected type of supply voltage modulation for the adaptive power amplifier. The baseband processor may also provide a control interface signal to a controller within the adaptive power amplifier. The controller, based on the received control interface signal provides a configuration signal that configures the impedance, the number of active amplifier cells, the bias of the active amplifier cells, and the supply voltage capacitive load to optimize the adaptive power amplifier based on the supply voltage modulation type.

Low power consumption adaptive power amplifier

A method in a wireless communication transmitter including a baseband processor () that configures the transmitter for a particular signal configuration, and a headroom controller () for adjusting transmitter headroom based on the particular signal configuration. In one embodiment, the headroom is controlled based on a power metric, for example, a 3order polynomial or a peak to average ratio (PAR) metric, that is a function of the signal configuration. In another embodiment, the headroom is adjusted using information in a look up table.

Signal configuration based transmitter adjustment in wireless communication devices

An apparatus and method for transmission power amplifier bias control in an enhanced data rate for global system mobile evolution mobile communication device. The apparatus can include a transmitter configured to transmit information on an enhanced data rate for global system mobile evolution network at a first transmitter output power. The transmitter can include a modulator configured to receive an input signal and map information in the input signal to symbols represented by eight phase offsets and a power amplifier configured to provide the first transmitter output power for transmitting the symbols represented by eight phase offsets. The apparatus can also include a controller configured to adjust a first bias condition of the power amplifier to a second bias condition based on a changed parameter of operation related to the data stored in a memory.

Apparatus and method for mobile communication device transmission

A power amplification circuit () includes a scalable power amplifier () to produce an RF output signal () at an output of the power amplification circuit (), and a variable impedance circuit () coupled to the output of the power amplification circuit (). The scalable power amplifier () includes a plurality of selectively activated amplifier elements (), (), () to produce the RF output signal () in accordance with a desired RF output signal power level. The power amplification circuit () selectively activates individual amplifier elements by, for example reducing power or increasing power to at least one amplifier element. The variable impedance circuit () varies an impedance of the variable impedance circuit () to dynamically load the output of the scalable power amplifier ().

A method for fabricating an RF enhancement mode FET () having improved gate properties is provided. The method comprises the steps of providing () a substrate () having a stack of semiconductor layers () formed thereon, the stack including a cap layer () and a central layer () defining a device channel, forming () a photoresist pattern () over the cap layer, thereby defining a masked region and an unmasked region, and, in any order, (a) creating () an implant region () in the unmasked region, and (b) removing () the cap layer from the unmasked region. By forming the implant region and cap region with no overlap, a device with low current leakage may be achieved.

Advanced RF enhancement-mode FETs with improved gate properties

An enhancement mode RF device and method of fabrication includes a stack of compound semiconductor layers, including a central layer defining a device channel, a doped cap layer, and a buffer epitaxially grown on a substrate. Source and drain implant areas, extending at least into the buffer, are formed to define an implant free area in the device channel between the source and drain. Source and drain metal contacts are positioned on an upper surface of the central layer. Several layers of insulation and dielectric are positioned over the device and a gate opening is formed and filled with gate metal. During epitaxial growth, the doped cap layer is tailored with a thickness and a doping to optimize channel performance including gate-drain breakdown voltage and channel resistance.

Enhancement mode RF device and fabrication method

An enhancement mode semiconductor device has a barrier layer disposed between the gate electrode of the device and the semiconductor substrate underlying the gate electrode. The barrier layer increases the Schottky barrier height of the gate electrode-barrier layer-substrate interface so that the portion of the substrate underlying the gate electrode operates in an enhancement mode. The barrier layer is particularly useful ill compound semiconductor field effect transistors, and preferred materials for the barrier layer include aluminum gallium arsenide and indium gallium arsenide.

Semiconductor device using a barrier layer between the gate electrode and substrate and method therefor

A semiconductor device includes a transistor (30, 51) having a gate electrode (15, 52) wherein the gate electrode (15, 52) has a highly resistive portion (24, 25, 55). The highly resistive portion (24, 25, 55) is integrated into the gate electrode (15, 52) and is coupled to the gate electrode (15, 52) using a via-less contact method.

Semiconductor transistor with stabilizing gate electrode

A semiconductor device (20) is formed on a compound semiconductor substrate (21). The semiconductor device (20) is oriented on the surface (40) of the compound semiconductor substrate (21) such that the physical forces that result from the thermal heating or cooling of the compound semiconductor substrate (21) are essentially equal. This orientation reduces the variability of the drain to source current of the semiconductor device (20) as the semiconductor device (20) is operated at different temperatures.

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Lake Zurich, IL, United States of America

Ernest Schirmann