Burr-brown Research Corporation

Other

Ernest E Godsey

Francis L Payne

George W Hoyle

Rusty S Christensen

This disclosure relates to an improved apparatus for and method of packaging an electronic device which has at least two electrically operative components which may be printed circuit boards, and a case to space the electrically operative components so that their respective functional surfaces can be positioned in a predetermined relationship, such as to establish a flush surface to allow the application of a single adhesive backed overlay to seal the multiple functional surfaces against entry of foreign matter. The case also serves as a means to gird an elastomeric connecting element which is compressed by the electrically operative components to electrically connect those components.

Electronic device package

Method and system for responding to an interrupt signal sent to a microprocessor from one of a plurality of peripheral devices. An acknowledge signal is transmitted from the microprocessor to the peripheral devices. The acknowledge signal operatively isolates select/request terminals of the respective peripheral devices from outputs of a select code decoder. The acknowledge signal also enables the select/request terminals to be inputted to a priority encoder. The acknowledge signal further enables a signal to be produced on the select/request terminal of the interrupting peripheral device, thereby causing the priority encoder to produce a select code representative of the interrupting peripheral device. The select code is subsequently inputted to the microprocessor to enable the microprocessor to access an interrupt service subroutine for the interrupting peripheral device. Subsequent to the end of the acknowledge signal, the select code is inputted by the microprocessor to a select code decoder and is decoded thereby to produce an enable signal which is transmitted to the select/request terminal of the interrupting peripheral device. The enable signal enables the interrupting peripheral device to communicate with the microprocessor via the data bus, thereby permitting the interrupting peripheral device to be serviced by the accessed interrupt service subroutine.

Interrupt system and method

A switching regulator system and method for producing regulated output voltage and current in response to an unregulated input voltage, including a plurality of switching regulators connected in parallel and control circuitry to accomplish uniform loading of each of the switching regulators according to the rated current producing capacity of each regulator. The switching regulators each include a switching transistor, an inductor responsive to the switching transistor, a free-wheeling diode responsive to the inductor, and a comparator for providing an output signal representative of whether the regulated output voltage exceeds a threshold. The control circuitry poroduces a control signal repesentative of the logical OR of the comparator output signals. Each of the indivdual switching regulators includes buffer circuit responsive to the control signal and coupled to the base electrodes of the respective switching transistors for turning all of the switching transistors on and off substantially simultaneously in response to the control signal. The individual switching regulators thereby supply the output current of the switching regulator system proportinately to the designed current producing capacities of the individual regulators. For identical switching regulators, each will supply an equal current to the load. For circuits with unequal design capacities the switching transistors have equal duty cycles, thereby proportioning the load current from each regulator according to its designed current producing capacity.

Parallel connected switching regulator system

This relates to a packaging apparatus for coupling modular hardware (e.g. printed circuit boards) to both the bus of a digital system and to industrial end devices such as relays, thermocouples, etc. A motherboard connected to the rear of a card cage couples a first group of edge connectors on each card to the digital system bus. The motherboard has a plurality of clearance holes therein for providing access to a second group of edge connectors on each card. A dedicated terminal assembly having end device field wiring connected thereto is electrically coupled to the second group of edge connectors of a particular card by either passing a suitable connector attached to the assembly through one of the clearance holes or by coupling the second group to the assembly by a suitable cable which passes through the hole.

Growing community of inventors

Tucson, AZ, United States of America

Ernest E Godsey