Radiawave Technologies Co., Ltd.

Intel Corporation

Erkan Alpman

Ning Zhang

Jon Sweat Duster

Haigang Feng

Yulin Tan

Xiaofeng Guo

Ashoke Ravi

Stefano Pellerano

Kameran Azadet

Shilpa Talwar

Hosein Nikopour

Bryan K Casper

Ofir Degani

Wook Bong Lee

Michael Genossar

Claudio Da Silva

Debabani Choudhury

Rotem Banin

Albert Molina

Sidharth Dalmia

Georgios Yorgos Palaskas

Igal Kushnir

Duncan Kitchin

Oner Orhan

Saku Lahti

Emanuel Cohen

Mikko S Komulainen

Jayprakash Thakur

Gadi Shor

Eren Sasoglu

Arnaud Lucres Amadjikpe

Menashe Soffer

Kunal Datta

Ana M Yepes

Omer Asaf

Run Levinger

Moshe Teplitsky

Chintan S Thakkar

Eshel Gordon

Josef Hagn

Ron Pongratz

Tawfiq Musah

Baljit Singh

Nebil Tanzi

Peter Sagazio

Amit Freiman

Eyal Goldberger

Kaushik Dasgupta

Eran Gerson

Shmuel Ravid

Yossi Tsfati

Meir Gordon

Anandaroop Chakrabarti

Resti Montoya Moreno

Nir Weisman

Noam Kogan

Shuhei Yamada

Marian K Verhelst

Mikko M Lampinen

Miroslav Baryakh

Naftali Landsberg

Ra'anan Sover

Avi Tsarfati

Lior Shakedd

Anat Bazov

Stefano Brenna

Saeid Daneshgar Asl

Amr M Fahim

Shinwon Kang

Te Yu Kao

Nathan G Narevsky

Gregory Chance

Brandon Davis

Farhana Sheikh

Gregory W Chance

Brandon R Davis

Yanjie J Wang

Ahmad B Khairi

Shreyas Sen

Liuan Zhang

Amy L Whitcombe

Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.

Wireless communication technology, apparatuses, and methods

Disclosed are a two-stage audio gain circuit based on analog-to-digital conversion and an audio terminal. The two-stage audio gain circuit includes a PGA configured to receive an analog audio signal and perform programmable gain amplification processing on the received analog audio signal; an ADC configured to convert the analog audio signal after the programmable gain amplification processing into a digital audio signal and output the digital audio signal; a first AGC gain unit configured to perform a first AGC processing on the digital audio signal and output a first gain adjustment value to the PGA, for the PGA to perform gain adjustment on the received analog audio signal; and a second AGC gain unit configured to perform a second AGC processing on the digital audio signal and output a second gain adjustment value to the PGA, for the PGA to perform gain adjustment on the received analog audio signal.

Two-stage audio gain circuit based on analog-to-digital conversion and audio terminal

Disclosed are an audio ADC for supporting voice wake-up and an electronic device. The audio ADC includes a programmable gain amplifier (PGA) having an input terminal for receiving an audio signal; a bypass switch having an input terminal for receiving an analog audio signal; and a successive approximation ADC having input terminals respectively connected to output terminals of the PGA and the bypass switch; the PGA gains and amplifies the audio signal, the bypass switch bypasses the PGA, and outputs the analog audio signal; the successive approximation performs analog-to-digital conversion with noise shaping on the analog audio signal after gain amplification at a first sampling rate/oversampling rate when the audio ADC is normal working, and turns off noise shaping when the audio ADC is sleep, performs analog-to-digital conversion on the analog audio signal output by the bypass switch at a second sampling rate/oversampling rate, and outputs to a DSP.

Audio ADC for supporting voice wake-up and electronic device

Disclosed are a pre-drive module of an analog-to-digital converter and an analog-to-digital conversion device. The pre-drive module includes a sampling capacitor; a controller configured to output a reset control signal, a pre-sampling control signal, and a sampling control signal according to a preset timing sequence; a reset module configured to reset the sampling capacitor upon receiving the reset control signal; a first auxiliary drive circuit configured to amplify an input analog signal and output to the sampling capacitor for sampling upon receiving the sample control signal; and a second auxiliary drive circuit. The controller is configured to output the pre-sampling control signal before outputting the sampling control signal, control the second auxiliary drive circuit to amplify the input analog signal, and output to the sampling capacitor for pre-sampling, and when a charging voltage of the sampling capacitor during pre-sampling reaches a preset voltage value, output the sampling control signal.

Pre-drive module of analog-to-digital converter, and analog-to-digital conversion device

Disclosed are an analog-to-digital converter error shaping circuit and a successive approximation analog-to-digital converter. The analog-to-digital converter error shaping circuit includes a decentralized capacitor array, a data weighted average module, a mismatch error shaping module, a control logic generation circuit, a digital filter and a decimator. The decentralized capacitor array includes two symmetrically arranged capacitor array units, each capacitor array unit includes a first sub-capacitor array of a high segment bit and a second sub-capacitor array of a low segment bit. The data weighted average module is configured to eliminate correlation between the first sub-capacitor array and an input signal, and the mismatch error shaping module is configured to eliminate correlation between the second sub-capacitor array and the input signal.

Analog-to-digital converter error shaping circuit and successive approximation analog-to-digital converter

A reference voltage controlling circuit and an analog-to-digital converter are disclosed. The reference voltage controlling circuit includes a reference voltage generating circuit, a plurality of groups of sampling switching units and a logic controlling circuit. The DAC capacitor array switches the sampling switching units to a second positive reference voltage and a second negative reference voltage before starting sampling or conversion, and is charged and discharged with the second positive reference voltage and the second negative reference voltage to raise a voltage to a preset voltage. The sampling switching unit is switched to a first positive reference voltage and a first negative reference voltage to charge and discharge the DAC capacitor array to a target voltage. The rising of the voltage from the preset voltage to the target voltage is completed by the first positive reference voltage and the first negative reference voltage.

Reference voltage controlling circuit and analog-to-digital converter

A residue transfer loop, a successive approximation register analog-to-digital converter and a gain calibration method are disclosed. In particular, the residue transfer loop includes a sampling switch module, a logic controlling circuit, a residue holding capacitor module, a DAC capacitor array, a residue transfer module, a current rudder, a reset switch module and a charge sharing switch module. The logic controlling circuit sequentially outputs control signals according to preset time intervals in a preset period to control the reset switch module, the residue transfer module, the sampling switch module and the charge sharing switch module to work sequentially, thereby realizing a residue transfer.

Residue transfer loop, successive approximation register analog-to-digital converter, and gain calibration method

An apparatus is provided which comprises: a mixer to mix a first signal of a first frequency with a second signal of a second frequency, and to generate a first output; a switched-capacitor multiplier, coupled to the mixer, to receive the first output and to provide a second output with reduced noise; and an amplifier, coupled to the switched-capacitor multiplier, to amplify the second output.

Fully integrated wake-up receiver

A mixer-first receiver operates to generate filtering and analog-to-digital conversion concurrently and adaptively, while removing an LNA before a mixer to enable integration with digital baseband circuits. A plurality of switching capacitor arrays are integrated with a hybrid analog-to-digital filtering component. Switching capacitor arrays of the plurality of switching capacitor arrays can be selectively modified to perform both the filtering operation and the conversion operation together. The same switch capacitors of a switching capacitor array can be utilized in one phase of a clock cycle for the filtering and in another phase of the clock cycle for the conversion.

Digital intensive hybrid ADC/filter for LNA-free adaptive radio front-ends

Growing community of inventors

Portland, OR, United States of America

Erkan Alpman