Intel Corporation

Tektronix, Inc.

Erik J Johnson

Aaron R Kunze

James L Jason, Jr

David M Putzolu

Stephen D Goglin

Travis T Schluessler

Ylian Saint-Hilaire

Arun Raghunath

Frederick William Strahm

Harrick M Vin

Bernie Keany

Ravi L Sahita

Rita H Wouhaybi

Steven R King

Manasi Deval

Jasmeet Chhabra

Jiangtao Li

Ansuya Negi

Hermann Gartler

Todd A Anderson

Suhail Ahmed

Don Newell

Frank Geoffrey Gates

Kapil Jain

Philip K Jansen

James L Jason Jr

James Jason

Stephen Cp Joseph

Russell E Blette

Arthur V Lang

Technologies for securely pairing a first computing device with a second computing device include the first computing device to generate a session message key based on a key exchange with the second computing device. The first computing device receives a message including a hardware key certificate, 5 a cryptographically-signed communication, and a message authentication code from the second computing device. The cryptographically-signed communication is signed with a private hardware key of the second computing device. The first computing device validates the message authentication code, the certificate, and the signature received from the second computing device. After validation, the first computing device 10 identifies a user of the second computing device based on user-identifying data received from the second computing device.

Secure pairing for secure communication across devices

Technologies for securely transferring whiteboard content data from a smart whiteboard device to another smart whiteboard device are disclosed. The smart whiteboard device may securely transfer the whiteboard content data to a mobile device. In response to receiving the whiteboard content data from the smart whiteboard device, the mobile device may transfer the received whiteboard content data to the other smart whiteboard device. The other smart whiteboard device may display the transferred whiteboard content data and enable manipulation thereof.

Secure transfer of whiteboard content

In some embodiments, the invention involves a framework for using virtualization technology to efficiently support a domain-specific run-time environment. In at least one embodiment, a framework is utilized to take advantage of virtualization technology (VT) to partition performance critical and non-performance critical tasks of the same domain-specific application. An embodiment of the invention utilizes a general-purpose operating system to execute non-performance critical aspects of a domain, and uses a privileged VT-root mode to execute performance critical aspects of the domain. Another embodiment uses one or more guest VMs to execute the performance critical aspects of the domain-specific run-time environment. Other embodiments are described and claimed.

Framework for domain-specific run-time environment acceleration using virtualization technology

A method and apparatus to improve packet processing is disclosed.

Method and apparatus for improving packet processing

In general, in one aspect, an interface chipset includes at least one interface to receive user commands from input devices, filters to monitor the received user commands and to copy the user commands associated with at least a subset of the input devices, and an isolated execution environment. The isolated execution environment is to provide a secure communication link between an on-line application and a remote service provider. The isolated execution environment is also to detect at least some subset of user command modifications, on-line application code modifications, and on-line application process flow modifications. The isolated execution environment is further to notify the remote service provider when a modification is detected via the secure communication link.

Chipset based cheat detection platform for online applications

In general, in one aspect, a computer-implemented method includes determining a digest value based on hash operations on values of, at least, a set op-codes of multiple instructions of a program during execution of the program by a processor.

Digest generation from instruction op-codes

In general, in one aspect, an add-in card includes inaccessible memory to store an identity key, wherein the identity key is to enable a secure communication link. The add-in card also includes an isolated execution environment and a machine-accessible medium comprising content. The content when executed by the isolated execution environment causes the isolated execution environment to route secure communications between an on-line application and a remote service provider through the isolated execution environment to provide a secure communication link therebetween, detect on-line application code modifications, detect on-line application process flow modifications, and notify, via the secure communication link, the remote service provider when a modification is detected.

Add-in card based cheat detection platform for online applications

A system, apparatus, method and article to perform dynamic service management for multicore processors are described. The apparatus may include, for example, a processing device having multiple types of processors to process packets. A service manager may dynamically assign executable files for multiple services to the multiple types of processors during execution of the executable files based on packets processed for each service. Other embodiments are described and claimed.

Dynamic service management for multicore processors

In some embodiments, the invention involves a novel combination of techniques for prefetching data and passing messages between and among cores in a multi-processor/multi-core platform. In an embodiment, a receiving core has a message queue and a message prefetcher. Incoming messages are simultaneously written to the message queue and the message prefetcher. The prefetcher speculatively fetches data referenced in the received message so that the data is available when the message is executed in the execution pipeline, or shortly thereafter. Other embodiments are described and claimed.

Method and apparatus for speculative prefetching in a multi-processor/multi-core message-passing machine

A system bus may be used as an inter-switch communications link to transfer packets between virtualized interfaces on different virtualized network interface controllers that are accessible by a plurality of virtual machines. The inter-switch communications link may also be used for advanced power management through the use of intelligent packet redirection when virtualized interfaces are lightly utilized.

Switch scaling for virtualized network interface controllers

Source code includes a directive to indicate data structures of related data to a compiler. The compiler associates the related data to the same one of multiple processors in a multiprocessor environment. The compiler searches the source code for locks associated with the related data, and generates executable code that is modified with respect to locks written in the source code. The compiler may replace or remove locks written in the source code to protect access to the related data, resulting in an executable program that does not include the locks.

Compiler-based critical section amendment for a multiprocessor environment

A compiler transforms source code into intermediate code and provides the intermediate code to a profiler. The profiler executes the intermediate code. The profiler generates a performance profile that indicates the performance of the intermediate code, and annotates the intermediate code based, at least in part, on data from the performance profile. The compiler receives annotated intermediate code from the profiler and transforms the annotated intermediate code into machine code. Alternatively, the compiler transforms intermediate code to machine code and provides the machine code to a profiler. The profiler executes the machine code and generates a data file that indicates the performance of the machine code. The compiler receives the data file, and modifies the machine code based on the data file.

Generating executable code based on code performance data

In general, in one aspect, the disclosure describes a method of determining if a first query for data related to a protocol data unit in a first table is a query to a table merged into a combination table formed from multiple tables. If so, the method can generate a second query for the first query for data stored by the combination table.

Growing community of inventors

Portland, OR, United States of America

Erik J Johnson