Hewlett-packard Development Company, L.P.

Other

Hewlett-packard Company

Erik E Erlandson

David Onstenk

John P Miller

David Tremblay, Jr

A memory includes an address bus, address counter, address decoder, comparator, and control circuit. During a data read or write cycle, the address bus receives an external address, the address counter generates an internal address, which the address decoder decodes, and the comparator compares the external address to a value. Based on the relationship between the external address and the value, the comparator enables or disables the data transfer. For example, such a memory can terminate a page-mode read/write cycle by determining when the current external column address is no longer equal to the current internal column address. This allows the system to terminate the cycle after a predetermined number of data transfers by setting the external column address to a value that does not equal the internal column address. Or, the comparator can compare the external or internal address to a predetermined end address, and the memory can terminate the cycle when the external or internal address equals the end address.

Memory having increased data-transfer speed and related systems and methods

In one embodiment, a check valve includes an outer region and a central region. One or more cuts wind from the outer region towards the central region. In the presence of flow along one direction, the check valve opens by extending the central region away from the outer region. In the presence of flow in the reverse direction, the check valve closes by retracting the central region towards the outer region.

Check valve

In one embodiment, a check valve includes an outer region and a central region. One or more cuts wind from the outer region towards the central region. In the presence of low along one direction, the check valve opens by extending the central region away from the outer region. In the presence of flow in the reverse direction, the check valve closes by retracting the central region towards the outer region.

A network device receives packets from a first network segment, time stamps the packets as they arrive, and transmits the packets to a second network segment. By time stamping packets as they arrive, stale packets can be identified and discarded. A stale packet is a packet that has been pending in the network device longer than an active timeout interval, which may be varied based on network traffic levels to conserve network bandwidth. Packets may also be discarded to conserve packet buffer memory in the network device. For example, when an incoming packet arrives and an output buffer in which the packet must be stored is full, the output buffer is scanned to identify and discard packets that have exceeded a minimum timeout interval, thereby allowing the incoming packet to be stored in the output buffer. Many network protocols initiate the retransmission of packets after a timeout interval has expired and an acknowledge packet has not been received. The present invention conserves network bandwidth by not transmitting stale packets that either will be ignored or redundant when network traffic becomes heavy. The present invention also conserves buffer memory by allowing broadcast and multicast packets to be stored in and transmitted from a single broadcast packet output buffer. The proper packet transmission order at each port is maintained by comparing the time stamp assigned to the broadcast packet when it arrived at the network device with the time stamps of the other packets in the output buffer. Finally, the present invention provides many opportunities for collecting statistics, such as the average latency, mean latency and standard deviation of the latency of packets processed by network device.

Method and apparatus for processing network packets using time stamps

A variable-stroke, constant-compression, reversible radial pump, the stroke of which may be infinitely adjusted by means of a variable-throw eccentric from a normal-cycle maximum through zero to a reverse-cycle maximum, and the compression of which is maintained constant through the use of a variable-geometry cylinder-head assembly. The cylinder geometry varies when the cylinder head is raised and lowered by means of a synchronized screw arrangement which is coupled through a gear set to the variable-throw eccentric. The variable throw-eccentric comprises a hollow input shaft which is drilled and threaded diametrically. A threaded, splined adjustment shaft is screwed into the threaded diametric hole in the input shaft. Each end of the adjustment shaft is mounted in bearing races which are anchored at diametrically opposed points in a connecting-rod journal. The adjustment shaft may be rotated by means of a rack gear which slides back and forth within the hollow portion of the input shaft and operates on the splines of said adjustment shaft. As the threaded, splined shaft is rotated, the position of the journal with respect to the input shaft is changed, which equates with a change in drive eccentricity and stroke of the pump.

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Roseville, CA, United States of America

Erik E Erlandson