Agere Systems Inc.

Lucent Technologies Inc.

Ncr Corporation

Nederlandse Organisatie Voor Toegepast-natuurwetenschappelijk Onderzoek Tno

Agere Systems Guardian Corp.

Erik Bert Busking

Maarten Visee

Richard D Van Nee

Yanling Sun

Maurice Van Wanum

Andries Peter De Hek

Yang Ling Sun

An amplifier circuit includes an amplifier stage () having an amplifier transistor () with a gate coupled to an input () of the amplifier stage, a source coupled to a reference connection (gnd) and a drain coupled to a positive power supply connection (V+). The amplifier circuit includes a bias stage () having a bias transistor (), a drain resistance () and a source resistance (). The bias transistor includes a gate coupled to a negative power supply connection (V&#x2212;), a source coupled to the negative power supply connection (V&#x2212;) via the source resistance and a drain coupled to the reference connection via the drain resistance and to the gate of the amplifier transistor. The bias stage includes a further resistance () coupled from a node between the source of the bias transistor and the source resistance of the bias transistor to a circuit node that carries a voltage higher than the voltage at the negative power supply connection.

Amplifier with compensated gate bias

A communication system with variable filter bandwidth includes a first mixer circuit configured to receive a communication signal and shift the frequency range of the communication signal to a first frequency range. A second mixer circuit is configured to receive the same communication signal and shift the frequency range of the communication signal to a second frequency range. An activation circuit is coupled to the first and second mixer circuits so as to provide an activation signal that activates at least one of the mixer circuits. A plurality of filter circuits are provided such that each filter circuit is configured to receive a signal from a corresponding mixer circuit, when the corresponding mixer circuit is activated.

Filter switching system and method

The present invention is directed to a comparator circuit for use with in-phase and quadrature phase signals and a method of comparing a resultant vector of the in-phase and quadrature phase signals. In one embodiment, the comparator circuit includes a non-titled comparison circuit that compares a resultant vector of the in-phase and quadrature phase signals to vertical and horizontal comparison boundary member pairs. The comparator circuit also includes a tilted comparison circuit, coupled to the non-tilted comparison circuit, that compares the resultant vector to comparison boundary member diagonals coupled to the vertical and horizontal comparison boundary member pairs. The comparator circuit may still further include a combiner circuit that provides a comparison signal based on signals from the non-tilted and tilted comparison circuits.

Comparator circuit, related method of comparing a vector to comparison boundaries and transmitter employing the same

The present invention is directed to a vector monitor for use with a transmitter employing in-phase and quadrature phase input and feedback signals, and a method of controlling a transmitter. In one embodiment, the vector monitor includes an error detection circuit configured to provide first and second components of an error signal based on the input and feedback signals. Additionally, the vector monitor includes a comparator circuit, coupled to the error detection circuit, configured to compare a resultant vector of the first and second components to a comparison boundary and control a power level of the transmitter based on the comparison.

Vector monitor, related method of controlling a transmitter and transmitter employing the same

The present invention provides, for use in a radio frequency (RF) transmitter that employs a power amplifier to transmit broadband signals, the power amplifier introducing amplitude and phase distortion, a group delay precompensator circuit. In one embodiment, the group delay precompensator circuit includes: (1) a Cartesian feedback loop coupled between an output of the power amplifier and an input of the RF transmitter; and (2) a group delay compensation block, located in the Cartesian feedback loop, that introduces an opposing phase characteristic into the Cartesian feedback loop and thereby precompensates for the phase distortion. A method of precompensating a group delay and an RF transmitter incorporating the precompensator or the method are also disclosed.

Group delay precompensator for broadband radio frequency transmitter and method of operating the same

A communication system with variable filter bandwidth includes a first mixer circuit configured to receive a communication signal and shift the frequency range of the communication signal to a first frequency range. A second mixer circuit is configured to receive the same communication signal and shift the frequency range of the communication signal to a second frequency range. An activation circuit is coupled to the first and second mixer circuits so as to provide an activation signal that activates at least one of the mixer circuits. A plurality of filter circuits are provided such that each filter circuit is configured to receive a signal from a corresponding mixer circuit, when said corresponding mixer circuit is activated.

An antenna array system combines the antenna signals from separate antennas using at least one delay in the RF path of an antenna. In certain embodiments, the antenna array system combines the antenna signals in the Radio Frequency (RF) domain before analog-to-digital (A/D) conversion, thereby reducing the amount of hardware required when compared to antenna array systems where the antenna signals are combined digitally. In doing so, signals from antennas are combined with signals from a plurality of antennas to determine if they improve signal quality. Only signals determined to improve signal quality are maintained as active. In accordance with other aspects, the antenna system selects parameter settings for the antenna array to provide enhanced performance.

Delay line antenna array system and method thereof

A semiconductor device comprises a signal pin mounted on a base plate by adhesive. Parasitic capacitance exists between the pin and the base plate in the region of adhesive and may deleteriously affect the operation of circuitry in chip connected to pin by a bond wire. A bond wire connecting pin to the base plate has an inductance which forms a parallel resonant circuit with the parasitic capacitance, so that, at the resonant frequency, signals on pin at substantially the same frequency pass to or from the chip substantially unattenuated by the parasitic capacitance. Alternatively, the inductances of the signal pin and the bond wires may be such that, at the frequency of signals on the signal pin, an impedance transformation is provided between the input to the signal pin and the end of the first bond wire where it connects to the chip.

Semiconductor device having a signal pin with multiple connections

An RF detector circuit (28), which may be utilized in an output power control loop (10) for an RF transmitter, includes a bridge circuit (50) including a first arm (52) containing a first diode (D2) which rectifies the RF signal and a second arm (54) which contains a second diode (D3) series-coupled to the first diode (D2), and having an RF bypass capacitor (C4). The second diode (D3) serves as a temperature compensator for the first diode (D2). The outputs of the bridge circuit (50) are connected to the inputs of a differential amplifier circuit (32) which provides a signal for use in the power control loop (10). The detector input signal is derived from the sense output of a directional coupler (22). In a second embodiment the compensating diode (D13) has its cathode coupled to the cathode of the rectifying diode (D12), and the full voltage across the rectifying diode (D12) is applied to the differential amplifier circuit (32).

Temperature compensated radio frequency detector circuit

An antenna assembly includes a dipole antenna (D1, D2) and a monopole antenna (C1) having substantially perpendicular polarization directions. The dipole antenna (D1, D2) is provided with a balun (E1, E2) a portion (E1) of which serves as a backplane for a microstrip transmission line (G0, G1, G2) which transmits RF signals. The microstrip transmission line includes a first portion (G0) connected to a coaxial feed cable (F), a second portion (G1) having its ends respectively connected by a first switch (A) to the monopole antenna (C1) and a second switch (B) to the balun portion (E1) and a third portion (G2). When the switches (A, B) are closed to render the monopole antenna (C1) operative, the third portion (G2) serves to detune the dipole antenna (D1, D2). The assembly may be formed as a two-sided printed circuit board.

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Den Haag, Netherlands

Erik Bert Busking