Intel Corporation

Other

Primarion Corporation

Erik A McShane

Malay Trivedi

James T Doyle

Mahesh S Natu

Robert T Carroll

Nicholas D Triantafillou

Sivakumar Radhakrishnan

Jose Niell

Alain Gravel

Brad Burres

John Ryan Goodfellow

Naru Dames Sundar

Kevin Mori

Jayasekhar Tholiyil

Roger W Liu

Mark J Kachmarek

Sihin Seyfou

An error handling device logs errors in a computing system including a plurality of devices connected to the error handling device. The error handling device provides groups of error registers. Each group of error registers is associated with a value of a plurality of values. Each of the devices that communicate errors to the error handling device are associated with one of the values. The error handling device receives error messages from the devices connected to the error handling device and for each received error message of the received error messages, determines a value of the plurality of values associated with the device transmitting the received error message, determines the group of error registers associated with the determined value, and log the received error message in the determined group of error registers.

Logging errors in error handling devices in a system

Technologies for processing network packets by a network interface controller (NIC) of a computing device include a network interface, a packet processor, and a controller device of the NIC, each communicatively coupled to a memory fabric of the NIC. The packet processor is configured to receive an event message from the memory fabric and transmit a message to the controller device, wherein the message indicates the network packet has been received and includes the memory fabric location pointer. The controller device is configured to fetch at least a portion of the received network packet from the memory fabric, write an inbound descriptor usable by one or more on-die cores of the NIC to perform an operation on the fetched portion, and restructure the network packet as a function of an outbound descriptor written by the on-die cores subsequent to performing the operation. Other embodiments are described herein.

Technologies for processing network packets by an intelligent network interface controller

In some embodiments, a multi-phase converter with dynamic phase adjustment is provided. In some embodiments, a controller may include circuitry to control how many phase legs are active based on output current and also which phase legs are to be enabled.

Dynamically adjusted multi-phase regulator

Inductors packaged with a voltage regulator for an integrated circuit within the same package are deposited to a sufficient thickness to reduce resistance and improve the quality factor. Furthermore, the voltage regulator switches currents through the inductors at a relatively high frequency such that the overall size and inductances of the inductors may be reduced. As a consequence, integrating both the integrated circuits including a voltage regulator and associated inductor array in a single package is facilitated. Other embodiments are described and claimed.

Packaged voltage regulator and inductor array

A configurable power control system is disclosed. The power control system can include a control module, an enable/disable module coupled to a power rail (i.e. an internal power line) to enable and disable power to the power rail. The system can also include a sequencer module coupled to the first and a second power rail to sequence power to the power rail(s). The system can also include a fault detect module to detect system parameters. Additionally, the system can include a memory module to store user input and can store detected faults to be utilized by the control module and other modules to control interrelationships between the enable module, the sequencer module, the fault detect module, power in, and power provided via the power rails.

Arrangements for integrated circuit power management

Disclosed is a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements. Power is supplied by one or more power integrated circuits (IC) each having a high side power switch controlled by pulse width modulated signals and a low side power switch. The power IC senses voltage at the load and has an on-chip current mirror for generating a current that is a ratio of current delivered to the load. The power IC also has current limiting and on-chip temperature sensing components. The voltage and current information is digitized and provided to a control integrated circuit (IC). The control IC receives this digitized information as well as user provided parameters and, in the regulation mode of operation, provides digitized pulse width modulated control signals to the power IC. In an active transient response mode of operation, the control IC provides signals to turn either the high side switches or low side switches ON. Fault detection circuitry identifies over voltage, under voltage, and excessive temperatures. All communications between the control IC and the power IC are digital providing high bandwidth, optimal control frequency response, noise immunity and efficient active transient response.

Digitally controlled voltage regulator

Growing community of inventors

Phoenix, AZ, United States of America

Erik A McShane