Scientific Computer Systems Corporation

Other

Erick M Cook

Hanan Potash

Andrew E Phelps

Jennifer S Schuh

Mark A Haakmeester

William B Thompson

A hybrid thermionic valve and solid state audio amplifier. A complete tube amplifier is scaled to produce a relatively low power yet also retain its small and large signal distortion characteristics. The output of the scaled amplifier is amplified by a relatively linear solid state amplifier. In one embodiment of the invention, a plurality of tube amplifiers are coupled in parallel and input to a mixing circuit for selectably mixing the outputs of the tube amplifiers and providing the mixed outputs to the solid state amplifier.

Hybrid thermionic valve and solid state audio amplifier

In a computer which superpositions vector and scalar operations and in which operation results and operands are conducted between buffer registers and functional units on a bidirectional databus system, the result of one or more currently-executing scalar operations can be routed directly to the input of one or more functional units, bypassing the buffer registers and saving computer operational time. A scalar result is routed through a linking apparatus which directly connects a bidirectional databus path on which the scalar result is being conducted to a databus path on which a scalar operand is to be conducted. The routing is conditioned upon identity between the scalar result and operand and upon availability of a databus path to support the scalar operation. If the conditions are not met, the scalar result is conducted to the buffer registers, where it is held until needed or until a databus path is available.

Linking scalar results directly to scalar operation inputs on a

A bi-directional databusing system is used in a computer that superposes vector and scalar operations. The computer consists of a main memory, a plurality of pipelined functional units, and a buffer for staging scalar and vector data objects between the main memory and the functional units. The busing system supports two-way data transfer during each of a succession of bus transfer cycles in which data is transferred to the buffer during one phase of a cycle, and from the buffer during a second cycle phase. The busing system includes three sets of bi-directional memory databuses, one for transferring scalar data objects between the main memory and buffer unit, and the other two for transferring vector data objects between the main memory and the buffer. The bus system also includes a set of bi-directional function buses, each for transferring scalar and vector data objects between the buffer and the functional units, with the ratio of the number of data objects transferred to the functional units during a transfer cycle to the number of data objects transferred to the buffer during the same cycle corresponding to a predetermined parametric value.

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La Jolla, CA, United States of America

Erick M Cook