Texas Instruments Corporation

Texas Instruments Incorporated Deutschland, Gmbh

Siemens Aktiengesellschaft

Erich-Johann Bayer

Ivan Shumkov

Antonio Priego

Gerhard Thiele

Hans Schmeller

Ruediger Ganz

Kevin Scoones

Joerg Kirchner

Franz Prexl

Christian Harder

Juergen Neuhaeusler

Bodo Braun

Gaetano Petrina

Oliver Nachbaur

Byung-Seok Kim

Eckart Mueller

In a circuit for DC-DC voltage converters, an amplifier has first and second inputs coupled to a reference voltage terminal and an output voltage terminal, respectively. A comparator has first and second inputs coupled to an amplifier output and a switching terminal, respectively. A logic circuit has inputs coupled to the comparator output and a clock terminal. A driver circuit has first and second inputs coupled to first and second logic outputs, respectively. A first transistor having a first control terminal coupled to the first driver output is coupled between a supply voltage terminal and the switching terminal. A second transistor is coupled between the switching terminal and a ground terminal, and has a second control terminal coupled to the second driver output. A threshold detection circuit is configured to provide a threshold signal responsive to a current through the second transistor crossing a current threshold.

Power-save mode for fixed-frequency DC-DC converter

An example of a power supply system includes a switching voltage regulator comprising at least one switch configured to conduct an input current to generate an output voltage responsive to a switching signal and based on an input voltage. The system also includes a current regulator configured to generate a current sample voltage based on an amplitude of the input current relative to a reference current defining a maximum average amplitude setpoint of the input current to set a switching time defining a switching period of the at least one switch. The system also includes a switch controller configured to provide the switching signal to control the at least one switch based on an amplitude of the output voltage relative to a reference voltage and based on the switching time.

Current regulator system

A circuit includes a first power converter having a first voltage input and a first output. The circuit also includes a second power converter having a second voltage input coupled to the first voltage input, a clock input, and a second output. A phase shifter is coupled between the first output and the clock input of the second power converter.

Daisy chain clock distribution system

Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a first switch coupled between a first node and a second node and a second switch coupled between a third node and the second node. The circuit further includes a resistor coupled between the second node and a fourth node and a capacitor comprising a first terminal coupled to the fourth node and a second terminal. The circuit further includes a transistor comprising a drain terminal coupled to the third node, a source terminal coupled to a fifth node, and a gate terminal and an amplifier comprising a first input terminal coupled to the fifth node, a second input terminal coupled to the fourth node, and an output terminal coupled to a sixth node.

Current sense circuit topology

Generally, displays, like liquid crystal displays (LCDs), use a DC-free addressing voltage in order to prevent decomposition of the display. Here, an integrated circuit (IC) is provided that compensates for temperature dependencies. This IC typically uses a thermistor or temperature varying element to measure the temperature of the display and adjusts the common reference voltage in response to the measured temperature.

Apparatus and method for driving displays

An electronic device includes circuitry for driving a light-emitting diode (LED) or other light-emitting semiconductor device. The circuitry includes a first switch (NM) coupled with the light-emitting semiconductor device (LED) for switching a current (I) through the light-emitting semiconductor device (LED); a sensing means (R) for sensing a magnitude of the current (I) and outputting a respective sensing signal (SEN); an error amplifier (AMP) for receiving the sensing signal (SEN) and a target value (ISET) for the current (I) for providing a first control voltage (VG) based on the deviation of the actually sensed current magnitude and the current target value (ISET); a lowpass filter coupled to the error amplifier (AMP) for filtering the first control voltage (VG) and providing a second control voltage (VG); a voltage follower (NM) coupled to the lowpass filter and the first switch for receiving the second control voltage (VG) and providing a third control voltage (VG) for controlling the first switch's (NM) switching activity; and a second switch (PM, NM) for switching a supply current (IDS) of the voltage follower (NM) for switching the voltage follower (NM) on and off.

Light-emitting semiconductor device driver and method

The invention relates to a DC/DC converter circuit including a voltage conversion circuit and a regulator circuit comprising a reference voltage generator circuit and a comparator which outputs a control signal for activating/deactivating the voltage conversion circuit as a function of the output load of the converter circuit. The converter circuit additionally comprises a circuit for signaling the regulator circuit ON/OFF comprising a comparator, at the first input of which a further voltage characterizing the output voltage and, at the second input of which a voltage at a capacitor is applied, and a control circuit comprising switches which during the ON time of the regulator circuit control the capacitor so that it is charged to a voltage which differs by a predetermined amount from the voltage characterizing the output voltage, and when it has attained the design value it signaling the regulator circuit OFF and separating the capacitor from the charging voltage, the comparator outputting a signal to the control circuit when the further voltage characterizing the output voltage and the voltage across the capacitor agree, resulting in the regulator circuit being returned ON.

DC/DC converter circuit

An unregulated inductorless direct current to direct current converter comprising a first voltage-to-current converter configured to convert a first voltage to a first current and a second voltage-to-current converter configured to convert a second voltage to a second current. A regulation circuit is coupled to the first and second voltage-to-current converters and configured to generate an output current proportional to the difference between the first and second currents. Also a variable frequency oscillator is coupled to the regulation circuit, the oscillator receiving as a control current the output current therefrom and outputting a clock signal having a frequency proportionate to the control current. The converter further comprises an output stage coupled to receive the clock signal and receiving an input voltage and outputting an output voltage, the output voltage and the input voltage having a ratio that is determined by the clock signal.

Frequency control circuit for unregulated inductorless DC/DC converters

A step-up DC voltage converters circuit and method of operation which overcomes the problems associated with the prior art skip mode converters by reversing the flow of energy in the step-up DC voltage converter at the end of each switching cycle for a short constant time duration, thus making it possible to operate the step-up DC voltage converter over the full load current range at a fixed frequency which substantially facilitates filtering the output voltage. In addition to this the peak-to-peak output voltage ripple is less as compared to that of skip mode converters.

Step-up DC voltage converter and method of operation

A method for storing video signal data of at least a partial frame in standard memory components includes providing standard memory components with 2.sup.m possible memory addresses, addressing b pixels with x address bits and separately addressing z lines with y address bits through picture addresses, and selecting b&lt;2.sup.x, z&lt;2.sup.y, and m, b, z, x and y as positive integers 2.sup.m is selected to be as small as possible but greater than the product of b and z. The x address bits and y address bits are recoded utilizing bit combinations not occurring in the picture addresses for uniquely assigning each occurring picture address its own memory address. A circuit configuration for performing the method includes a memory device having memory address input terminals for addressing 2.sup.m possible memory addresses, a data input terminal, and a data output terminal. A control device assigns picture addresses to video signal data and controls memorization of the video signal data. The control device has picture address terminals carrying picture addresses with separate x address bits for pixel addressing and y address bits for line addressing. A recoding apparatus is connected between the picture address terminals and the memory address input terminals for uniquely assigning each picture address its own memory address. A device is provided for reading out video signal data from the memory device.

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Thonhausen, Germany

Erich-Johann Bayer