Dallas Semiconductor Corporation

Eric W Mumper

Francis A Scherpenberg

Robert D Lee

Donald R Dias

John W Rea

Hal Kurkowski

William L Payne, Ii

A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.

Systems and methods for memory control

A battery charger with varying applied voltage and varying series resistance invoked in response to battery charge level provides an optimizable multipart load line for charging. The multipart load line may be programmed into a memory within the battery charger, and thereby common design battery chargers may be configured with optimized multipart load lines for diverse batteries. Programming access can be over the charge current output terminal for both one-wire communication and programming high voltage for EPROM programming.

Battery charger systems and methods

Reset monitor for detection of power failure and external reset for devices such as microprocessors with the reset monitor providing a single settling time hold down of a reset signal. Preferred embodiments include bandgap reference with high current side compensating resistor, bond out options for analog parameter selection, glitch free state machine control of both detections, and external pushbutton debouncing both depression and release.

Reset monitor for detection of power failure and external reset

Memory controller for nonvolatile RAM operation, systems and methods

Battery monitor (100) with a transient pull down (172) for backup batteries which is active during power up and prevents the feedthrough charging of low or dead batteries causing a spurious power fail indication.

Growing community of inventors

Dallas, TX, United States of America

Eric W Mumper