3Com Corporation

Other

Netgear, Inc.

Eric Roger Davis

Chi-Lie Wang

Nathaniel H Henderson

Richard S Reid

Anthony Liem Pan

Marwan A Fawal

Krishna Uppunda

Alexander Herrera

David R Brown

Glenn William Connery

Nathan Henderson

Kirk Blattman

Jeffrey Ross

A method and apparatus for providing system clock failover using a one-shot circuit are disclosed. A process, in one embodiment, is able to detect a clock failure using a one-shot circuit, wherein the clock signals are generated by a first clock circuit. Upon generating a switching signal in response to the clock failure, a system reset signal is asserted for a predefined time period in accordance with the clock failure. After switching a second clock circuit to replace the first clock circuit, the process is capable of resuming the clock signals via the second clock circuit.

Method and apparatus for providing system clock failover

A method and apparatus for automatically loading device status information into a network device. One embodiment comprises an apparatus in a network device, wherein the network device enters a sleep state under particular conditions. In one embodiment, the apparatus is for communicating with other devices on the network and comprises control circuitry that controls communication between the network device and the other devices on the network. The apparatus further comprises a memory device that stores configuration data for the control circuitry, wherein at least a portion of the configuration data is loaded into the control circuitry upon initialization of the network device. The apparatus further comprises a buffer that stores keep-alive data that is transmitted to a plurality of the other devices in the network to refresh the presence of the network device in the network, wherein the keep-alive data is loaded into the buffer from the memory device upon initialization of the network device.

Method and apparatus for automatically loading device status information into a network device

A method and apparatus for automatically configuring a configurable integrated circuit. One embodiment comprises a method for automatically loading data including configuration data to a configurable integrated circuit upon initialization of a system in which the configurable integrated circuit is embedded. The method of one embodiment comprises storing a plurality of commands and a plurality of data elements in a non-volatile memory of the system. The method further comprises reading contents of an initial address in the non-volatile memory. If the initial address contains a command, depending upon a type of the command, the method comprises writing contents of a next address in the non-volatile memory to a register space of the configurable integrated circuit, to a configuration space of the configurable integrated circuit, or to a command space of the configurable integrated circuit.

Method and apparatus for automatically configuring a configurable integrated circuit

The invention discloses a system, device, and method for covert, wireless communication between a human handler and a trained animal. A small receiving unit is placed in a cured material which has conformed to the contours of a trained animal's inner ear thereby eliminating the need for an invasive method for implanting anything into the animals ear. The receiving unit has no external communication features such as wires or external antennae and thus it is covert. The transmitting unit may be hand-held by the animal's handler or used with a headset and attached microphone. Neither the transmitting or receiving units have any wires or external antennae that may be dangerously snagged while the animal is performing service or be noticed by any onlookers.

Device and method for safely inserting an electronic device in an ear of a four-legged non-human trained animal

A serial bus with pre-defined protocol may be used on the NIC to provide PC management functions. While these functions may be used with the PC powered up, they may further perform valuable tasks while the PC is powered down. With these new added functions, centralized control may be achieved which will lower the administrative cost and serve better for distributed computing.

Method and apparatus for using serial bus for PC management

The present invention allows NIC resources to be accessed through auxiliary power and an ASIC clock while the PC is powered down and while PCI power and the PCI clock are not available. The present invention also provides an alternate path for accessing the NIC registers, downloading keep-alive and alert-on-LAN packets to the transmit packet buffer (TPB), as well as uploading received packets from the receive packet buffer (RPB). The present invention also allows monitoring PCI activity and seamlessly servicing the PCI configuration cycle (when PCI power and the PCI clock are restored) in conjunction with responding to the access through the alternate path (while PCI power and the PCI clock are not available).

Network interface card accessible during low power consumption mode

Low power event monitoring enabling logic allows wake up devices to maintain their proper functionality in the event of a momentary power loss, or in the event the operating system does not properly load upon power-up. The technology is particularly suited for use with network interface card supporting Wake-On-LAN functions. A component with low power enabling logic is provided for a system having power management resources responsive to power management event signals to switch to an operating state. The component comprises power logic having a first mode in which power consumption is limited to a first specified level and a second mode in which power consumption is limited to a second specified level higher than the first specified level. The component includes an interface to nonvolatile memory storing a control signal. Logic is coupled to the interface to the nonvolatile memory and responsive to detection of a power supply voltage to read in the first mode the control signal from the nonvolatile memory, and to the signal the power logic to enter the second mode in response to a specified state of the control signal. Monitoring resources operating in the second mode monitor for an event, and in response to detection of the event produce a signal to cause the system switch to the operating mode.

Low-power apparatus for power management enabling

One embodiment of the invention includes a transformer that is at least partially formed on a substrate. The transformer is for electrical isolation and signal filtering. The transformer includes the following elements. A portion of the substrate has two holes through the substrate. A ferrite core is formed in a loop through the two holes. A primary winding is made of a first metal trace. The first metal trace is formed in a spiral around one hole. The first metal trace has at least two primary terminals acting as an input to the transformer. The transformer also includes a secondary winding. The secondary winding is made of a second metal trace. The second metal trace is formed in a spiral around the other hole. The second metal trace has at least two secondary terminals acting as an output from the transformer. The parasitic capacitance of the first metal trace and the magnetizing inductance of the primary winding cause signals received at the primary terminals to be filtered as the signals are passed through the transformer to the secondary terminals.

Isolation and signal filter transformer

A qualified burst cache facilitates burst mode data transfer between a first clock domain and a second clock domain by simplifying cache control structures. A cache is marked as qualified when full or there is no more data to be written to the cache, allowing burst data to be transferred out of said cache. The invention has applications in network adapter cards for transferring data between a host system bus and a network where the bus and network operate at different speeds and are therefore part of different clock domains.

Qualified burst cache for transfer of data between disparate clock

A method and an apparatus for automatically sensing and configuring a termination in a network bus configuration are provided by input logic signals indicating whether or not a device connected to the network bus is located at an end position. If the device is at an end position, the network is automatically terminated by a matched load impedance located in the device. Because the load resistance at the ends of the network match the impedance of the communication medium, data loss due to signal reflections is eliminated.

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Sunnyvale, CA, United States of America

Eric Roger Davis