Monterey Design Systems, Inc.

Eric McCaughrin

Lawrence Thomas Pileggi

Douglas B Boyle

Sharad Malik

Abhijeet Chakraborty

James S Koford

Majid Sarrafzadeh

Salil Ravindra Raje

Christopher J Dunn

Gary K Yeap

Feroze P Taraporevala

David Gluss

Lilly Shieh

Robert E Shortt

Dennis Yamamoto

Tong Gao

Joseph T Rahmeh

Dinesh D Gaitonde

Emre Tuncer

Archie Li

Yau-Tsun Steven Li

Satamurthy Pullela

Sam Jung Kim

A timing graph representing timing information of an integrated circuit design may change after modifications are made to the integrated circuit design. The modifications change timing parameters for edges in the timing graph. The measure of these changes may be computed at a computed measure compared to a threshold. In the event the measure exceeds the threshold, the edges in the timing graph that need to change in response to the modifications are updated. Otherwise, the current edges in the timing graph are continued to be used. The threshold is set in accordance with the accuracy and efficiency requirements of an electronic design automation tool.

Method for accurate and efficient updates of timing information logic synthesis, placement and routing for integrated circuit design

A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.

Method for design optimization using logical and physical information

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Oakland, CA, United States of America

Eric McCaughrin