International Business Machines Corporation

Eric Marz

John Edward Sheets, Ii

Kirk David Peterson

Michael Stephen Floyd

Todd Alan Christensen

Phillip John Restle

Gregory Scott Still

Brian Thomas Vanderpool

Eric Jason Fluhr

Francesco A Campisano

Rahul Batra

Richard L Willaman

Isidore G Bendrihem

Ian Krispin Carmichael

Michael N Goulet

Rory Tatum

Data relating to one or more circuit paths may be collected during a design stage of a processor chip based on a design model. One or more delta values may be added to the one or more circuit paths of the design model. One or more broken circuit paths may be identified based on the one or more delta values. A target time for each of the one or more broken circuit paths may be adjusted.

Processor chip timing adjustment enhancement

Providing deterministic frequency and voltage enhancements for a processor is disclosed. In an embodiment, a microcontroller on a processor identifies a plurality of parameters related to a processor, the plurality of parameters including at least a current supplied to the processor; determines, in dependence upon the plurality of parameters, one or more frequency scaling indexes including determining an effective switching capacitance ratio; identifies, in dependence upon the one or more frequency scaling indexes, a predetermined frequency parameter for the processor; and transitions, based on the frequency parameter, the processor to a target clock frequency. In another embodiment, a microcontroller on a processor decreases, incrementally, a power supply voltage for a processor; determines that a voltage droop parameter exceeds a voltage droop parameter threshold; and increases, incrementally, the power supply voltage in response to determining that the voltage droop parameter exceeds a voltage droop parameter threshold.

Providing deterministic frequency and voltage enhancements for a processor

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WILLISTON, VT, United States of America

Eric Marz