Synopsys, Inc.

Eric M Mlinar

Jamil Kawa

Stephen Robert Whiteley

Robert E Freeman

A superconducting anti-fuse based field programmable gate array (FPGA) may include a first set of superconducting passive transmission lines, a second set of superconducting passive transmission lines, and at least one anti-fuse located at an intersection of a first superconducting passive transmission line from the first set of superconducting passive transmission lines and a second superconducting passive transmission line from the second set of superconducting passive transmission lines. A first terminal of the anti-fuse may be electrically connected to the first superconducting passive transmission line and a second terminal of the anti-fuse may be electrically connected to the second superconducting passive transmission line. The anti-fuse may transition from a first state having a non-zero resistance to a second state having a zero resistance below a critical temperature.

Superconducting anti-fuse based field programmable gate array

A parameterized superconducting circuit may include a set of sub-blocks which include superconducting circuitry. Different sub-blocks in the set of sub-blocks may be clocked using clock signals having different phases. Along a first direction, relative locations of the set of sub-blocks may be fixed. Along a second direction, relative locations of the set of sub-blocks may be determined based on a set of parameter values.

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Santa Clara, CA, United States of America

Eric M Mlinar