Intel Corporation

Eric L Debes

William W Macy, Jr

Huy Van Nguyen

Yen-Kuang Chen

Minerva M Yeung

Julien Sebot

Matthew J Holliman

Patrice L Roussel

Jonathan Jay Tyler

Igor V Kozintsev

Mark J Buxton

Bret L Toll

Millind Mittal

Hong Jiang

Benny Eitan

Alexander D Peleg

Scott Dion Rodgers

Larry M Mennemeier

Carole Dulong

Eiichi Kowashi

Frank Binns

James S Coke

Wolf C Witt

Peter J Ruscito

David B Jackson

Masood Tahir

William Macy

Minerva M Young

Vesselin Naydenov

Patrick J Fay

William W Macey, Jr

Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.

Processor to execute shift right merge instructions

Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.

Method and apparatus for shuffling data

Bitstream buffer manipulation with a SIMD merge instruction

Growing community of inventors

Santa Clara, CA, United States of America

Eric L Debes