Westinghouse Electric Corporation

Electric Power Research Institute Incorporated

Sundstrand Corporation

Eric J Stacey

Laszlo Gyugyi

Michael B Brennen

Geoffrey M Smith

Donal E Baker

John Rosa

Ralph D Jessee

Colin D Schauder

Alberto Abbondanti

Thomas H Putman

Andress Kernick

George S Bettencourt

Charles L Doughman

Eugene L Rodgers

Mark G Gernhardt

Frank Cibulka

Sets of phase shifting interphase transformers are used to combine the outputs of six-pulse static inverter stages to generate harmonic neutralized outputs with higher pulse counts. The phase shifting interphase transformers have a primary winding and at least one secondary winding. For phase shifting interphase transformers having a single secondary winding, a tap on the primary winding is connected through the secondary windings on one of the other phase shifting interphase transformers to produce a combined output having a displacement factor which preserves the displacement factors of the inputs. When the phase shifting interphase transformer has two secondary windings, the tap on the primary is a center tap which is routed through secondary windings on each of the other two phases. Higher pulse count inverters are constructed by combining outputs of the phase shifting interphase transformers with additional shifting interphase transformers to generate a combined output. For inverters with an odd number of six-pulse inverter bridges, a hierarchy of phase shifting interphase transformers produces a single 'pairs' output which is in phase with and combined with the output of the remaining inverter stage by a current splitting interphase transformer to produce the final, harmonic neutralized output.

Harmonic neutralized voltage sourced inverter employing phase shifting

A high power inverter pole for a voltage sourced inverter suitable for providing compensation in electric power transmission and distribution systems, has a positive switching valve and a negative switching valve connected between closely spaced dc-source terminal, respectively, and a common ac terminal to form a current loop with minimum loop area thereby reducing stray loop inductance and limiting the overshoot voltage on serially connected electronic switches which make up the valves. In a preferred embodiment, the valves are mounted on opposite sides of the web of an insulative I-beam. The electronic switches are incorporated in modular switching units connected in series by C-channel connecting conductors having flanges bolted to the I-beam flanges. The modular units include broad, flat conductors bolted through end flanges to the C-channel connecting conductors. The electronic switches and anti-parallel diodes of the modular units are clamped between these broad, flat conductors. Cooling water is circulated through the broad, flat conductors which serve as heat sinks as well as providing low inductance electrical connections. In another embodiment of the invention, sections of the positive and negative switching valves are folded back on themselves to minimize loop area and hence again, reduce stray loop inductance.

High power inverter pole employing series connected devices configured

An apparatus for use in the simultaneous deactivation of a set of series-connected switching devices includes gate command control logic to generate a gate command signal for application to a selected switching device of the set of series-connected switching devices. A command compensation circuit processes the gate command signal. The command compensation circuit includes a time differential measurement module that forms a time differential signal indicative of the time from the previous turn-off of the selected switching device and the previous turn-off of the last switching device in the set of series-connected switching devices. A time difference processing module of the command compensation circuit process the time differential signal and creates a delay signal. A delay module of the command compensation circuit delays the gate command signal in response to the delay signal. Each switching device of the set of series-connected switching devices includes a command compensation circuit. Consequently, the generated delay signals cause the series-connected switching devices to turn-off simultaneously.

Apparatus and method for simultaneously deactivating series-connected

The saturation of interphase transformers connected to an inverter is prevented through the use of an inverter switch firing control circuit. The inverter switch firing control circuit includes a control module to execute a standard switch firing scheme to produce a set of inverter pole output signals including a first inverter pole output signal and a second inverter pole output signal, with the first inverter pole output signal having a predetermined phase displacement from the second inverter pole output signal. The circuit also includes a control module to execute a system transient switch firing scheme wherein the inverter reduces the predetermined phase displacement between the first inverter pole output signal and the second inverter pole output signal in the presence of a system transient. This reduction in phase displacement between inverter pole output signals prevents saturation of interphase transformers. Thus, the size, cost, and weight of interphase transformers may be substantially reduced.

Apparatus and method to prevent saturation of interphase transformers

An apparatus for generating a sensing signal from a generally periodic multi-phase AC signal is set forth. The apparatus utilizes a plurality of integrator circuits, a single integrator circuit being respectively associated with each phase of the AC signal. The integrator circuits each generate an integrated signal from the respective phase of the AC signal by integrating the respective phase during a time period between sloping transitions of the respective phase. A reset circuit is respectively associated with each integrator circuit for resetting each integrator circuit at the sloping transitions of the respective phase. The integrated outputs are summed by a summing circuit to form the sensing signal.

Fast responding method and apparatus for three phase A/C voltage sensing

A voltage sourced inverter system includes an inverter for coupling to a DC power source and an interphase transformer bank coupled to the inverter. The inverter includes a number of poles for providing discretely displaced voltage waveforms to the interphase transformer bank. A main transformer operably coupled to the interphase transformer bank transforms power therefrom into an AC power output. The interphase transformer bank may be a singular stage or a hierarchial arrangement of plural interphase transformers which combine the discretely displaced voltage waveforms to reduce selected harmonic components therefrom. The inverter may provide notched waveforms to remove additional selected harmonics from the discretely displaced voltage waveforms. A method of inverting DC power into AC power with reduced selected harmonic components is also disclosed.

Optimized high power voltage sourced inverter system

Quasi-harmonic neutralized inverter systems are provided with interphase transformers connected in a waffle tree configuration and each having a pair of inputs for receiving staggered voltage waveforms, wherein the stagger angle of the voltage waveforms reduces a harmonic component of an output voltage on an output terminal of each interphase transformer. Inverters produce voltage waveforms at phase angles necessary to provide the required stagger angles at the inputs of the interphase transformers in a first stage of the waffle tree configuration. A method for quasi-harmonic neutralization of voltages in an inverter system is also provided, in which interphase transformers, each having a pair of inputs for receiving staggered voltage waveforms, are connected in a waffle tree configuration, such that the stagger angle of the voltage waveforms reduces a harmonic component of an output voltage on an output terminal of each interphase transformer. Voltage waveforms at phase angles necessary to provide the stagger angles are applied to the inputs of the interphase transformers in a first stage of the waffle tree configuration.

Harmonic neutralization of static inverters by successive stagger

A multiphased permanent magnet generator (PMG) driven by a rotating shaft, generates a multiphase output which is integrated and applied as the input to a high resolution phase locked loop having a binary counter with an output phase locked to the PMG multiphase output and representing shaft position. As applied to a high performance synchronous drive in which the PMG is driven by the synchronous machine, the digital shaft position signal is used to generate a multiphase current reference signal which is tracked by stator currents generated for the synchronous machine by a power current source. The multiphase current reference signal can be generated by a selected set of multiphase digital sine waveforms stored in a ROM which is part of the phase locked loop or is a separate waveform synthesizer.

PMG-based position sensor and synchronous drive incorporating same

Apparatus to extend the speed range and maximize torque of an ac drive by optimizing the torque angle as a function of speed. Using the back-emf of the machine, or the voltage from a permanent magnet generator mounted on the mtor shaft for reference, a novel analog biasing arrangement of a fast tracking multi-phase phase locked loop generates a set of stator current reference signals having a phase angle which is programmed to provide the optimum torque angle at any speed.

AC drive with optimized torque

A current fed unrestricted frequency converter (UFC) for supplying power with balanced voltages to a three-phase unbalanced load generates two sets of existence functions for controlling the switching matrices of the UFC to generate positive and negative sequence current components in the load. Existence function generators generating the positive and negative sequence existence functions are phase locked, respectively, to a positive sequence reference signal generated by a clock and a negative sequence reference signal derived by circuits which monitor the negative sequence voltage in the load. Select circuits alternately gate the positive and negative sequence existence functions to the UFC switching matrices in proportion to the detected magnitude of the negative sequence voltage in a sense to drive the negative sequence voltage in the load to zero. A neutral forming transformer eliminates any zero sequence voltage in the load so that all that remains is the positive sequence components of voltage which by definition are balanced.

Unrestricted frequency converter for unbalanced loads

A torque angle and peak current detector for a three-phase synchronous motor utilizes a phase-locked loop to generate a digital stator field position signal phase locked to the stator current. The phases of digital -sine and cosine reference signals generated from the field position signal are compared with x and y stator current component signals in multiplying digital to analog converters to generate a phase error signal which is driven to zero with the reference signals in quadrature with the current component signals at phase lock. The reference signals are also multiplied by in-phase current component signals and the products are summed to generate the peak current signal. A digital rotor angle position generated by a resolver and an analog to digital converter is subtracted from the digital field position signal to generate the torque angle signal.

Torque angle and peak current detector for synchronous motors

Broadband, single and multiphase phase lock loop circuits utilize a sliding window averager to remove the second harmonic and other ac components from a phase error signal which is the product of a sinusoidal or square wave source signal and a corresponding reference signal synthesized from a variable frequency signal produced by a voltage controlled oscillator as a function of the integratal of the phase error signal. The sliding window averager maintains a running average of a number of most recent samples of the phase error signal taken over a selected interval which is preferably one-half cycle of the source signal. Also preferably, the sliding window averager is clocked by the variable frequency signal generated by the voltage controlled oscillator.

Wide bandwidth phase locked loop circuit with sliding window averager

An ac drive in which the three phase ac current produced by a current controlled inverter is applied to the stator winding of a synchronous or induction motor through an autotransformer equipped with a neutral shorting switch. For starting from zero speed and operation at very low speeds below the speed at which the autotransformer could provide adequate volt-seconds for operation of the motor, the neutral shorting switch is opened so that the current is applied essentially directly to the stator. At normal and high speeds, the neutral shorting switch is closed so that the voltage to the motor stator is increased by the turns ratio of the autotransformer thereby increasing the speed range of the motor. By providing a number of sets of taps on the autotransformer each with a neutral shorting switch, the ac drive mimics the characteristics of a drive with a multi-ratio gear box.

Ac motor drive with switched autotransformer coupling

A quasi-harmonic neutralized static power converter comprises one or more threephase phase shifting transformers having open primary windings fed at opposite ends by poles in separate ones of an associated pair of six-pulse bridge inverter circuits. The secondary winding of at least one of the phase shifting transformers is a delta winding or a wye winding connected to a neutral line. In order to block zero sequence currents which would be induced in such secondaries, a zero sequence blocking transformer is inserted in either the primary of secondary of any one of the phase shifting transformers. Preferably, the zero sequence blocking transformer has three identical zero sequence blocking windings wound on a common core. Each of the zero sequence windings is connected in series with a separate one of the windings in the selected transformer primary or secondary. In the case of a wye secondary connected to a neutral line, a single zero sequence winding in the neutral line can block the zero sequence current in all three phases.

Simplified quasi-harmonic neutralized high power inverters

An absolute shaft position sensing circuit uses a magnetic sensor and a toothed wheel to produce two pulse trains which are used to determine the absolute position of a shaft which is coupled to the toothed wheel. One pulse train includes regularly spaced pulses which are fed to a phase locked loop to produce an oscillating output signal. A counter counts this signal and produces an output count which is representative of the relative angular position of the shaft. A second pulse train includes an irregularly spaced pulse. Circuitry is provided to detect the occurrence of this irregularly spaced pulse and to reset the counter in response to that occurrence, thereby making the count representative of the absolute angular position of the shaft.

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Pittsburgh, PA, United States of America

Eric J Stacey