Intel Corporation

Eric J Asperheim

Abhishek R Appu

Joydeep Ray

Altug Koker

Sanjeev S Jahagirdar

Kiran Chand Veernapu

Balaji Vembu

Subramaniam M Maiyuran

Kamal Sinha

Travis T Schluessler

Nikos Kaburlasos

Prasoonkumar Surti

Elmoustapha Ould-Ahmed-Vall

Peter L Doyle

John H Feit

Devan Burke

Jacek Kwiatkowski

Philip R Laws

Guei-Yuan Lueh

Kai Xiao

Linda L Hurd

David M Puffer

Abhishek Venkatesh

Wenyin Fu

Josh B Mastronarde

Bhushan M Borole

Tomasz Janczak

Slawomir Grajewski

Vasanth Ranganathan

Eric J Hoekstra

In accordance with some embodiments, the render rate is varied across and/or up and down the display screen. This may be done based on where the user is looking in order to reduce power consumption and/or increase performance. Specifically the screen display is separated into regions, such as quadrants. Each of these regions is rendered at a rate determined by at least one of what the user is currently looking at, what the user has looked at in the past and/or what it is predicted that the user will look at next. Areas of less focus may be rendered at a lower rate, reducing power consumption in some embodiments.

Regional adjustment of render rate

In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.

Hybrid low power homogenous grapics processing units

Methods and apparatus relating to techniques for a dual path sequential element to reduce toggles in data path are described. In an embodiment, switching logic causes signals for a single data path of a processor to be directed to at least two separate data paths. At least one of the two separate data paths is power gated to reduce signal toggles in the at least one data path. Other embodiments are also disclosed and claimed.

Dual path sequential element to reduce toggles in data path

Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive data for a current write operation to a memory, determine a number of bits in the received data for the current write operation to the memory which have changed from a previous write operation to the memory and in response to a determination that the number of bits in the received data for the current write operation to the memory which have changed from a previous write operation to the memory exceeds a threshold, to toggle a plurality of bits in the data for the current write operation to create an encoded data set and set an indicator bit to a value which indicates that the plurality of bits have been toggled. Other embodiments are also disclosed and claimed.

Power consumption management for communication bus

Methods and apparatus relating to techniques for dynamic control of liquid cooling pumps to provide thermal cooling uniformity are described. In an embodiment, modification is made to operation of one or more of: one or more cooling pumps or one or more fans, based at least in part on comparison of one or more detected temperature or noise values at one or more components of a processor with one or more corresponding threshold values. The processor may include the logic that causes the modification and one or more sensors, The sensors are thermally or acoustically coupled to the one or more components of the processor to determine the detected temperature or noise values. Other embodiments are also disclosed and claimed.

Dynamic control of liquid cooling pumps to provide thermal cooling uniformity

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El Dorado Hills, CA, United States of America

Eric J Asperheim