Intel Corporation

Xerox Corporation

Eric F Vannerson

Louis A Lippincott

Kalpesh Dhanvantrai Mehta

Sotos M Theodoulou

Wm Keith Baker

An apparatus includes a decoder to receive a compressed bit stream that is based on a coding standard. The decoder includes a hardware accelerator to decode a part of the compressed bit stream that is based on an operation that is common across multiple coding standards that includes the coding standard. The decoder also includes a programmable element to decode a part of the compressed bit stream that is based on an operation that is specific to the coding standard.

Decoder architecture systems, apparatus and methods

According to some embodiments, it is determined if a register is ready to exchange data with a processing element.

Determining if a register is ready to exchange data with a processing element

A device for providing an RF signal burst to an external load includes a voltage-controlled oscillator to generate a drive signal having a frequency f.sub.VCO fixed by an oscillator control signal. An RF driver stage coupled to the external load receives the drive signal and generates an RF signal burst in response to the drive signal. A current transformer coupled between the RF driver stage and the external load senses the current in the RF driver stage and generates a reference current having the same phase as the sensed current. A phase detector receives the reference current along with the drive signal and generates a phase detection signal that provides a measure of the phase of the current in the RF driver stage with respect to the drive signal. The phase detection signal can be used to adjust the oscillator control signal to drive the oscillator frequency to a desired value.

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Phoenix, AZ, United States of America

Eric F Vannerson