Nvidia Corporation

Eric Boucher

Franck Diard

Ian M Williams

Franck R Diard

Dustin James Rubin

In typical embodiments a three GPU configuration is provided comprising three discrete video cards, each connected to a standard monitor placed horizontally for a 3&#xd7; horizontal resolution. In this configuration, depending on the load on each GPU, the vertical split lines are dynamically adjusted. To adjust the load balancing according to these virtual split lines, the rendering clip rectangle of each GPU is adjusted, in order to reduce the number of pixels rendered by the heavily loaded GPU. These split lines define the boundary of the scene to be rendered by each GPU, and, according to some embodiments, may be moved horizontally. Thus for example if a GPU has a more complex rendering clip polygon to render than the other GPUs, the neighboring GPUs may render the rendering clip polygon it displays plus a portion of the rendering clip polygon to be displayed by heavily loaded GPU. The assisting GPUs transmit to the heavily loaded GPU the portion of the rendering clip polygon to be displayed by GPU via the chipset with a peer-to-peer protocol or through a communication bus. The split line is dynamically adjusted after each scene.

Load balancing in a system with multi-graphics processors and multi-display systems

A system, method, and computer program product are provided for allowing a head to enter a reduced power mode. A first processor having a first head is provided. Additionally, a second processor having a second head is provided. Furthermore, a link is provided, coupled between the first head of the first processor and the second head of the second processor for communicating first data therebetween. In operation, at least the second head of the second processor is capable of entering a reduced power mode.

System, method, and computer program product for allowing a head to enter a reduced power mode

One embodiment of the present invention sets forth a technique for displaying high-resolution images using multiple graphics processing units (GPUs). The graphics driver is configured to present one virtual display device, simulating a high-resolution mosaic display surface, to the operating system and the application programs. The graphics driver is also configured to partition the display surface amongst the GPUs and transmit commands and data to the local memory associated with the first GPU. A video bridge automatically broadcasts this information to the local memories associated with the remaining GPUs. Each GPU renders and displays only the partition of the display surface assigned to that particular GPU, and the GPUs are synchronized to ensure the continuity of the displayed images. This technique allows the system to display higher resolution images than the system hardware would otherwise support, transparently to the operating system and the application programs.

System and method for rendering and displaying high-resolution images

A system, method, and computer program product are provided for saving an unprocessed portion of as push buffer in response to an error. In use, operation of hardware is controlled utilizing a push buffer. Furthermore, an error is detected. In response to the error, an unprocessed portion of the push buffer is saved, at least in part.

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Los Gatos, CA, United States of America

Eric Boucher