Stmicroelectronics S.a.

Thomson Multimedia S.a.

Thomson-csf

Deutsche Thomson-brandt Gmbh

Thomson Consumer Electronics S.a.

Eric Benoit

Gilles Troussel

Céline Mas

Olivier Le Briz

Olivier Scouarnec

Philippe Zorzan

Bernard Hepp

Michael Maier

Antoine Dupont

Didier Doyen

Philippe Maige

Danika Chaussy

Jean-Marie Permezel

Celine Lardeau

C&eacute;line Lardeau

A method for regulating the biasing voltage of column control circuits of an array screen formed of LEDs distributed in lines and columns, the column control circuits being adapted to turning on at least one LED of a line. The method includes increasing the biasing voltage when the current flowing through at least one activated LED is smaller than a determined luminance current and of decreasing the biasing voltage when the current flowing through each activated LED is equal to the determined luminance current.

Automated adaptation of the supply voltage of a light-emitting display according to the desired luminance

A high-potential output stage includes an output circuit to power a load with a variable high potential when it receives a low-level active input logic signal. It also includes a driving circuit which produces a high-level control logic signal as a function of the input logic signal to drive the output circuit which is powered by a DC high potential. The output stage also synchronizes the input logic signal with variations of the variable high potential.

High-potential output stage

A method and circuit for displaying an image by activation of pixels of an array screen based on an image stored in digital form in memory point rows of a frame memory, having a stand-by mode that provides, at a frequency proportional to the display frequency, a cyclic succession of offset values; and for each row address of the frame memory, activating pixels of a screen line associated with said address offset by a same offset value based on the read states of the row associated with the address, and/or activating pixels of a screen line associated with the row address based on the read states of the frame memory row associated with the address offset by a same offset value.

Image display on an array screen

A method for displaying an image on an array screen by activation of screen pixels arranged in rows and columns, each pixel of a same row corresponding to a memory point of a same memory row, the memory point being set to an activation state when the corresponding pixel is to be activated, including the steps of identifying, among sets of the memory rows, the row sets for which at least one memory point of a row of the set is at the activation state; and successively selecting the only lines corresponding to the rows of the sets of rows identified for the pixel activation. The present invention also provides a device for displaying an image on an array screen.

Display of an image on an array screen by selective addressing of screen lines

The invention concerns a drive circuit for a plasma panel consisting of cells arranged at the intersections of lines and columns, comprising, for each column of the panel, a column drive unit () for selecting the column by applying a voltage window, the column having a different capacitance (C) depending on whether or not the neighboring columns are selected, each drive unit () comprising first elements (T, C, CS) for changing the capacitance in a first predetermined time interval during the low-to-high transition of the voltage window, and second elements (T) for discharging said capacitance in a second predetermined time interval during the high-to-low transition of the voltage window, the second elements being controlled on the basis of an estimation of the capacitance obtained from data (Qi&#x2212;, Qi+) indicating whether or not the neighboring columns of said columns have been selected.

Control circuit drive circuit for a plasma panel

A method for controlling cells of a plasma screen of array type, formed of cells arranged at the intersections of lines and columns, including the step of sequentially applying to each line an activation potential and, during the activation of a line, applying an activation potential to selected columns, in which, while a line is activated, the selected columns are non-simultaneously activated.

Method and circuit for controlling a plasma panel

A driver circuit for driving a plasma display panel comprising a plurality of cells arranged in a matrix of lines and columns; comprising a set of driver output stages connected to line or column electrodes to which a first electrode of cells of a same line or a same column are connected, respectively. The driver circuit includes a detection device for detecting a short circuit between two or more of the outputs of the driver output stages. It allows to test for alignment faults in the flexible cable connecting together the driver module housing incorporating the driver circuit and the electrodes of the plasma display panel.

Driver circuit for driving a plasma display panel driver module incorporating said circuit and method of testing such a module

The invention relates to a process and device for scanning cells of a matrix-controlled display for the displaying of grey levels of a video signal, the scan being split up into sub-scans relating to each bit of column control words, characterized in that, when the coding of image does not activate the high-order bit, the processing sub-scan relating to this bit is allocated to the displaying of an additional item which corresponds to a bit of lower weight than the smallest weight of the column control word used when the condition is not fulfilled. The applications of the invention relate to matrix-controlled display devices using the principle of temporal modulation for the generation of halftones, especially plasma panels of the a.c. type with memory or d.c. type with memory.

Process and device for scanning a plasma panel

A method for testing output connections of at least one driver circuit that drives a plasma display panel. According to the method, at least one output of the driver circuit is switched to a high level for a predetermined time period. The output of the driver circuit is switched to a low level, and the time to discharge the output of the driver circuit with a constant discharge current is measured. It is determined whether a capacitive load is connected to the output of the driver circuit based on the measured time to discharge. In one preferred method, these steps are repeated for each of the outputs of the driver circuit. A driver circuit for driving a plasma display panel is also provided. The driver circuit includes driver output stages, and means for selectively sinking a constant discharge current from the output of at least one of the driver output stages to ground. Additionally, the driver circuit includes means for producing a measuring logic pulse whose duration is a function of a time required to discharge the output, and means for determining whether a capacitive load is connected to the output based on the measuring logic pulse.

Method and circuit for testing the output connections of a driver

Disclosed are a method for the control of an image display screen displaying half-tones and a display device implementing this method. The disclosed method is used to control an image display screen of the type having cells arranged in rows and columns and working either in a state known as an 'OFF' state or in a state known as an 'ON' state in which they are activated and produce light. The method consists in activating the cells of each row during sub-periods of different duration, with orders of distribution of the sub-periods that are different between two successive rows. This results in a reduction of the amplitude of the variations of a load constituted by the cells in the &lt;&lt;lit&gt;&gt; state of these two consecutive rows. Application inter alia to alternating plasma panels.

Method for the control of an image display screen displaying half-tones

A method for the control of a display screen whose pixels are cells producing light is used to minimize certain image defects known as excess brightness defects caused by major variations in the number of cells activated. For this purpose, the invention operates on the sub-division of the activation times of the cells during a given cycle time to reduce a time during which cells, selected as a function of their luminance level, are the only ones to be activated. The disclosed method can be applied especially to the control of alternating type plasma panels.

Method for the control of an image display screen using the principle of

A more accurate voltage-to-time and then time-to-voltage conversion is accomplished by tailoring the amplitude versus time characteristics of the pulses generated in the voltage-to-time conversion. One embodiment includes applying a ramped voltage supply to an amplifier coupled between the voltage/time converter and the time/voltage converter. The ramped supply is arranged to condition the amplitude of a portion of respective pulses to include a slope similar to the ramped voltage applied to the time/voltage converter. This tends to effect a more accurate response in the time/voltage converter.

Method and facility for time/voltage conversion

The present invention is a video drive apparatus of the two ramp type which includes facility to selectively adjust the brightness and/or the contrast of an image reproduced on a display device. In this apparatus, at least one of the ramp signals is generated digitally by for example a counter. Provision is made to change the counting rate of such counter which effects a change in display contrast. Provision is also made to selectively change the phase of the ramp signal applied to the second stage relative to the start of respective pulses of the PWM signal thereby effecting brightness changes in the reproduced image.

Apparatus for providing contrast and/or brightness control of a video

An actuation circuit for a liquid crystal display includes a plurality of pixel elements constructed in the form of a matrix of columns and rows and a plurality of column capacitors connected to respective columns of the liquid crystal display that can be charged to store a signal to be displayed. The activation circuit comprises a number of blocks which each comprise a separate group of the columns forming the matrix of pixel elements, a corresponding number of column capacitors, and a plurality of data lines. The individual data lines receive respective signals and are connected to the column capacitors. A switch device is connected to each respective block for successively switching between the number of blocks. The signal to be displayed is fed in parallel through the data lines of the columns of a first block to charge respective column capacitors of the first block and after the charging of the column capacitors in the first block, the input lines are switched by the switch device to the data lines of the columns of the next-following block.

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Quaix en Chartreuse, France

Eric Benoit