Lam Research Corporation

Other

Lab Research Corporation

Eric A Hudson

Alexei Marakhtanov

Rajinder Dhindsa

Andrew D Bailey, Iii

Douglas L Keil

Andreas Fischer

S M Reza Sadjadi

Felix Leib Kozakevich

Mark Henry Wilcoxson

Lumin Li

Sangheon Lee

Nikhil Dole

John Patrick Holland

Gerardo Delgadino

Reza Sadjadi

Wan-Lin Chen

Leonid Belau

Ranadeep Bhowmick

Christopher Kimball

Peter Cirigliano

Kalman Pelhos

Ryan Bise

Sean S Kang

Sang Ki Nam

Kenji Takeshita

Merrett Wong

Joseph Scott Briggs

Eric H Lenz

Mukund Srinivasan

Jisoo Kim

Jaroslaw Walery Winniczek

Zhisong Huang

Camelia Rusu

Ji Soo Kim

Mike Kellogg

Francis Sloan Roberts

Chia-Chun Wang

Jim Rogers

Dennis Michael Hausmann

Mirzafer K Abatchev

Samantha SiamHwa Tan

Van Hoa Lee

Neil M Benjamin

Bradford J Lyndaker

Zhigang Chen

Shih-Ked Lee

Anthony De La Llera

James V Tietz

Shashank C Deshmukh

Ben-Li Sheu

Stephen M Sirard

Darrell Ehrlich

Takumi Yanagawa

Conan Chiang

Vinay Pohray

Ananth Indrakanti

Peng Wang

Odette Turmel

Hyung Joo Shin

Scott Briggs

Maryam Moravej

Mark Wiepking

George Matamis

John C Valcore, Jr

Jeffrey S Marks

Peter K Loewenhardt

Reza Arghavani

Jon Henri

Samantha S H Tan

Brian K McMillin

Ji Zhu

Nerissa Sue Draeger

Jun Xue

Tom A Kamp

Bing Ji

Kapu Sirish Reddy

David Wei

Aaron Eppler

Seokmin Yun

Joel M Cook

Aniruddha Joi

Kenneth Lucchesi

Bi-Ming Yen

Daxing Ren

Robert C Hefty

Thomas S Choi

Jialing Yang

Helen Louise Maynard

Matthew Scott Weimer

Bi Ming Yen

Prabhakara Gopaladasu

Mary Anne Manumpil

Alexei Marakhatanov

Karthik Subramanian Colinjivadi

John Valcore

Daniel Le

Dae-Han Choi

Yu Cheng

Zihao Ouyang

Ragesh Puthenkovilakam

Various embodiments herein relate to methods and apparatus for etching recessed features on a semiconductor substrate. The techniques described herein can be used to form high quality recessed features with a substantially vertical profile, low bowing, low twisting, and highly circular features. These high quality results can be achieved with a high degree of selectivity and a relatively high etch rate. In various embodiments, etching involves exposing the substrate to plasma generated from a processing gas that includes a chlorine source, a carbon source, a hydrogen source, and a fluorine source. The chlorine source may have particular properties. In some cases, particular chlorine sources may be used. Etching typically occurs at low temperatures, for example at about 25 C or lower.

High aspect ratio dielectric etch with chlorine

Methods and apparatuses for selectively etching silicon-and-oxygen-containing material relative to silicon-and-nitrogen-containing material by selectively forming a carbon-containing self-assembled monolayer on a silicon-and-nitrogen-containing material relative to a silicon-and-oxygen-containing material are provided herein. Methods are also applicable to selectively etching silicon-and-nitrogen-containing material relative to silicon-and-oxygen-containing material.

Selective attachment to enhance SiO:SiNetch selectivity

Provided herein are methods and related apparatus for depositing an ashable hard mask (AHM) on a substrate in a low pressure chamber using a dual frequency radio frequency component. Low pressure plasma enhanced chemical vapor deposition may be used to increase the etch selectivity of the AHM, permitting the use of a thinner AHM for semiconductor processing operations.

High density, modulus, and hardness amorphous carbon films at low pressure

A wafer is supported on a wafer support structure such that a lower peripheral open region exists between a peripheral portion of a bottom surface of the wafer and an edge ring structure. The edge ring structure is configured to circumscribe both the wafer support structure and the wafer. A plasma is generated above a top surface of the wafer. The plasma causes accumulation of byproduct material within the lower peripheral open region. A byproduct volatizing gas is supplied to the lower peripheral open region to control the accumulation of the byproduct material within the lower peripheral open region during generation of the plasma. Use of the byproduct volatizing gas to control the accumulation of the byproduct material within the lower peripheral open region serves to prevent electrical arcing and particle contamination.

Methods and systems for managing byproduct material accumulation during plasma-based semiconductor wafer fabrication process

A method for etching features in a silicon containing stack below a patterned mask is provided. The stack is partially etched by providing a halogen containing etch gas and forming the halogen containing etch gas into a halogen containing plasma, wherein the halogen containing plasma partially etches features with an etch front. A metal catalyst containing layer is deposited on the etch front of the features by providing a metal catalyst containing gas, forming the metal catalyst containing gas into a plasma, and selectively depositing more of the metal catalyst containing layer on the etch front and bottoms of the features than tops of the features. The features are further etched by providing a fluorine containing etch gas and forming a fluorine containing plasma, wherein the plasma selectively etches sidewalls adjacent to the etch front of the features with respect to sidewalls adjacent to tops of the features.

Profile optimization for high aspect ratio memory using an etch front metal catalyst

Provided herein are methods and apparatus for processing a substrate by exposing the substrate to plasma to simultaneously (i) etch features in an underlying material (e.g., which includes one or more dielectric materials), and (ii) deposit a upper mask protector layer on a mask positioned over the dielectric material, where the upper mask protector layer forms on top of the mask in a selective vertically-oriented directional deposition. Such methods and apparatus may be used to achieve infinite etch selectivity, even when etching high aspect ratio features.

High aspect ratio etch with infinite selectivity

A method for performing an etch process on a substrate includes applying a bias signal and a source signal to an electrode of a plasma processing system. The bias signal and the source signal are pulsed RF signals that together define a repeated pulsed RF cycle, wherein each pulsed RF cycle sequentially includes a first state, a second state, a third state, and a fourth state. The power level of the bias signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state. The power level of the source signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state.

Multiple state pulsing for high aspect ratio etch

A method for applying RF power in a plasma process chamber is provided, including: generating a first RF signal; generating a second RF signal; generating a third RF signal; wherein the first, second, and third RF signals are generated at different frequencies; combining the first, second and third RF signals to generate a combined RF signal, wherein a wave shape of the combined RF signal is configured to approximate a sloped square wave shape; applying the combined RF signal to a chuck in the plasma process chamber.

Process control for ion energy delivery using multiple generators and phase control

Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.

Carbon based depositions used for critical dimension control during high aspect ratio feature etches and for forming protective layers

A method for multi-state pulsing to achieve a balance between bow control and mask selectivity is described. The method includes generating a primary radio frequency (RF) signal. The primary RF signal pulses among three states including a first state, a second state, and a third state. The method further includes generating a secondary RF signal. The secondary RF signal pulses among the three states. During the first state, the primary RF signal has a power level that is greater than a power level of the secondary RF signal. Also, during the second state, the secondary RF signal has a power level that is greater than a power level of the primary RF signal. During the third state, power levels of the primary and secondary RF signals are approximately equal.

Multi-state pulsing for achieving a balance between bow control and mask selectivity

Systems and methods for cleaning an edge ring pocket are described herein. One of the methods includes providing one or more process gases to a plasma chamber, supplying a low frequency (LF) radio frequency (RF) power to an edge ring that is located adjacent to a chuck of the plasma chamber. The LF RF power is supplied while the one or more process gases are supplied to the plasma chamber to maintain plasma within the plasma chamber. The supply of the LF RF power increases energy of plasma ions near the edge ring pocket to remove residue in the edge ring pocket. The LF RF power is supplied during the time period in which a substrate is not being processed within the plasma chamber.

Systems and methods for cleaning an edge ring pocket

Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF-period, and to assist in the re-striking of the bottom plasma during the ON-period.

Pulsed plasma chamber in dual chamber configuration

A plasma processing system includes a plasma chamber having a substrate support, and a multi-zone gas injection upper electrode disposed opposite the substrate support. An inner plasma region is defined between the upper electrode and the substrate support. The multi-zone gas injection upper electrode has a plurality of concentric gas injection zones. A confinement structure, which surrounds the inner plasma region, has an upper horizontal wall that interfaces with the outer electrode of the upper electrode. The confinement structure has a lower horizontal wall that interfaces with the substrate support, and includes a perforated confinement ring and a vertical wall that extends from the upper horizontal wall to the lower horizontal wall. The lower surface of the upper horizontal wall, an inner surface of the vertical wall, and an upper surface of the lower horizontal wall define a boundary of an outer plasma region, which surrounds the inner plasma region.

Multi zone gas injection upper electrode system

A method of forming a feature in a stack comprising a dielectric material on a substrate is provided. An etch plasma is generated from an etch gas, exposing the stack to the etch plasma and partially etching the feature in the stack. The stack is primed. A protective film is deposited on sidewalls of the feature by repeating for a plurality of cycles the steps of exposing the stack to a first reactant, allowing the first reactant to adsorb onto the stack, and exposing the stack to a second reactant, wherein the first and second reactants react with one another to form the protective film over the stack. The etching, priming, and depositing a protective film are repeated until the feature is etched to a final depth.

Method for etching an etch layer

Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch.

Three or more states for achieving high aspect ratio dielectric etch

Growing community of inventors

Berkeley, CA, United States of America

Eric A Hudson